The Symmetrical
Array
At the heart of the Atmel architecture is a symmetrical array of identical cells,
see Figure 1. The array is continuous from one edge to the other, except for bus repeat-
ers spaced every four cells, see Figure 2 on page 5. At the intersection of each repeater
row and column there is a 32 x 4 RAM block accessible by adjacent buses. The RAM
can be configured as either a single-ported or dual-ported RAM(1), with either synchro-
nous or asynchronous operation.
Note:
1. The right-most column can only be used as single-port RAM.
Figure 1. Symmetrical Array Surrounded by I/O (AT40K20)
= FreeRAM
= Repeater Row
= I/O Pad
= Repeater Column
= AT40K Cell
4
AT40K/AT40KLV Series FPGA
0896C–FPGA–04/02
ATMEL [ ATMEL ]
