Figure 7-3. 3.3V configuration
(3.3V)
UVCC
UCAP
VCC
AVCC
PS/2 Pad
Band
Gap
I/O POR
BOD
PLL Comparator
AVR Core
3.3V Reg
USB Pad
UVSS
VSS
Important note:
In the 3.3V configuration, the internal regulator is bypassed. The regulator has to be disabled to
avoid extra power consumption.
7.0.1
Regulator Control Register – REGCR
Bit
7
6
-
5
-
4
-
3
-
2
-
1
-
0
-
REGDIS
R/W
0
REGCR
Read/Write
Initial Value
R
0
R
0
R
0
R
0
R
0
R
0
R
0
• Bit 0 – REGDIS: Regulator Disable
Set this bit to disable the internal 3.3V regulator. This bit should be used only in a full 3.3V appli-
cation. This bit is reset to 0 in every case. The firmware has the responsability to set it after each
reset if required.
40
AT90USB82/162
7707D–AVR–07/08
ATMEL [ ATMEL ]
