AT90USB82/162
Mode is equivalent to Standy Mode, but is also conserved for compatibility purpose. From
Extended Standby mode, the device wakes up in six clock cycle.
Table 8-2.
Active Clock Domains and Wake-up Sources in the Different Sleep Modes.
Active Clock
Domains
Oscillators
Wake-up Sources
Sleep Mode
Idle
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Power-down
Power-save
Standby(1)
X(1)
X(1)
X(1)
X
X
Extended
Standby
X(1)
X
X
Notes: 1. Only recommended with external crystal or resonator selected as clock source.
Notes: 1. For INT7:4, only level interrupt.
Notes: 1. Asynchronous USB interrupt is WAKEUPI only.
8.6
Power Reduction Register
The Power Reduction Register, PRR, provides a method to stop the clock to individual peripher-
als to reduce power consumption. The current state of the peripheral is frozen and the I/O
registers can not be read or written. Resources used by the peripheral when stopping the clock
will remain occupied, hence the peripheral should in most cases be disabled before stopping the
clock. Waking up a module, which is done by clearing the bit in PRR, puts the module in the
same state as before shutdown.
Module shutdown can be used in Idle mode and Active mode to significantly reduce the overall
power consumption.
8.6.1
Power Reduction Register 0 - PRR0
Bit
7
6
5
4
–
R
0
3
2
1
-
0
-
-
PRTIM0
R/W
0
PRTIM1
R/W
0
PRSPI
R/W
0
-
PRR0
Read/Write
Initial Value
R/W
0
R/W
0
R
0
R/W
0
• Bit 7-6 - Reserved bits
These bits are reserved and will always read as zero.
• Bit 5 - PRTIM0: Power Reduction Timer/Counter0
Writing a logic one to this bit shuts down the Timer/Counter0 module. When the Timer/Counter0
is enabled, operation will continue like before the shutdown.
43
7707D–AVR–07/08
ATMEL [ ATMEL ]
