15.10.5 Output Compare Register 1 A – OCR1AH and OCR1AL
Bit
7
6
5
4
3
2
1
0
OCR1A[15:8]
OCR1A[7:0]
OCR1AH
OCR1AL
Read/Write
Initial Value
R/W
0
R/W
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
0
15.10.6 Output Compare Register 1 B – OCR1BH and OCR1BL
Bit
7
6
5
4
3
2
1
0
OCR1B[15:8]
OCR1B[7:0]
OCR1BH
OCR1BL
Read/Write
Initial Value
R/W
0
R/W
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
0
15.10.7 Output Compare Register 1 C – OCR1CH and OCR1CL
Bit
7
6
5
4
3
2
1
0
OCR1C[15:8]
OCR1C[7:0]
OCR1CH
OCR1CL
Read/Write
Initial Value
R/W
0
R/W
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
0
The Output Compare Registers contain a 16-bit value that is continuously compared with the
counter value (TCNTn). A match can be used to generate an Output Compare interrupt, or to
generate a waveform output on the OCnx pin.
The Output Compare Registers are 16-bit in size. To ensure that both the high and low bytes are
written simultaneously when the CPU writes to these registers, the access is performed using an
8-bit temporary High Byte Register (TEMP). This temporary register is shared by all the other
16-bit registers. See “Accessing 16-bit Registers” on page 109.
15.10.8 Input Capture Register 1 – ICR1H and ICR1L
Bit
7
6
5
4
3
2
1
0
ICR1[15:8]
ICR1[7:0]
R/W
ICR1H
ICR1L
Read/Write
Initial Value
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
0
IThe Input Capture is updated with the counter (TCNTn) value each time an event occurs on the
ICPn pin (or optionally on the Analog Comparator output for Timer/Counter1). The Input Capture
can be used for defining the counter TOP value.
The Input Capture Register is 16-bit in size. To ensure that both the high and low bytes are read
simultaneously when the CPU accesses these registers, the access is performed using an 8-bit
temporary High Byte Register (TEMP). This temporary register is shared by all the other 16-bit
registers. See “Accessing 16-bit Registers” on page 109.
15.10.9 Timer/Counter1 Interrupt Mask Register – TIMSK1
Bit
7
6
5
4
–
R
0
3
2
1
0
–
–
ICIE1
OCIE1C
R/W
0
OCIE1B
R/W
0
OCIE1A
R/W
0
TOIE1
R/W
0
TIMSK1
Read/Write
Initial Value
R
0
R
0
R/W
0
• Bit 5 – ICIEn: Timer/Countern, Input Capture Interrupt Enable
134
AT90USB82/162
7707D–AVR–07/08
ATMEL [ ATMEL ]
