AT90USB82/162
Table 15-4. Waveform Generation Mode Bit Description(1)
WGM
n2
(CTCn
)
WGM
n1
(PWM
n1)
WGM
n0
Update
of
OCRnx
at
TOVn
Flag
Set on
Mo
de
WGM
n3
(PWM Timer/Counter Mode
n0)
of Operation
TOP
0xFFF
F
Immedi
ate
0
1
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
Normal
MAX
PWM, Phase Correct,
8-bit
0x00F
F
BOTTO
M
1
0
1
0
1
0
1
0
1
0
1
0
TOP
TOP
TOP
PWM, Phase Correct,
9-bit
0x01F
F
BOTTO
M
2
PWM, Phase Correct,
10-bit
0x03F
F
BOTTO
M
3
OCRn
A
Immedi
ate
4
CTC
MAX
TOP
TOP
TOP
0x00F
F
5
Fast PWM, 8-bit
Fast PWM, 9-bit
Fast PWM, 10-bit
TOP
TOP
TOP
0x01F
F
6
0x03F
F
7
PWM, Phase and
Frequency Correct
BOTTO
M
BOTTO
M
8
ICRn
PWM, Phase and
Frequency Correct
OCRn
A
BOTTO
M
BOTTO
M
9
BOTTO
M
10
11
12
PWM, Phase Correct
PWM, Phase Correct
CTC
ICRn
TOP
TOP
OCRn
A
BOTTO
M
Immedi
ate
ICRn
MAX
13
14
1
1
1
1
0
1
1
0
(Reserved)
Fast PWM
–
–
–
ICRn
TOP
TOP
OCRn
A
15
1
1
1
1
Fast PWM
TOP
TOP
Note:
1. The CTCn and PWMn1:0 bit definition names are obsolete. Use the WGMn2:0 definitions. However, the functionality and
location of these bits are compatible with previous versions of the timer.
131
7707D–AVR–07/08
ATMEL [ ATMEL ]
