AT90S1200
Sleep Modes
To enter the sleep modes, the SE bit in MCUCR must be set (one) and a SLEEP instruc-
tion must be executed. If an enabled interrupt occurs while the MCU is in a sleep mode,
the MCU awakes, executes the interrupt routine, and resumes execution from the
instruction following SLEEP. The contents of the register file and the I/O memory are
unaltered. If a Reset occurs during sleep mode, the MCU wakes up and executes from
the Reset Vector.
Idle Mode
When the SM bit is cleared (zero), the SLEEP instruction makes the MCU enter the Idle
mode, stopping the CPU but allowing Timer/Counters, Watchdog and the interrupt sys-
tem to continue operating. This enables the MCU to wake up from external triggered
interrupts as well as internal ones like Timer Overflow interrupt and Watchdog Reset. If
wakeup from the Analog Comparator interrupt is not required, the Analog Comparator
can be powered down by setting the ACD-bit in the Analog Comparator Control and Sta-
tus Register (ACSR). This will reduce power consumption in Idle mode. When the MCU
wakes up from Idle mode, the CPU starts program execution immediately.
Power-down Mode
When the SM bit is set (one), the SLEEP instruction makes the MCU enter Power-down
mode. In this mode, the External Oscillator is stopped while the External Interrupts and
the Watchdog (if enabled) continue operating. Only an External Reset, a Watchdog
Reset (if enabled), an external level interrupt on INT0 can wake up the MCU.
Note that when a level triggered interrupt is used for wake-up from Power-down, the low
level must be held for a time longer than the reset delay time-out period tTOUT. Other-
wise, the device will not wake up.
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0838H–AVR–03/02
ATMEL [ ATMEL ]
