Keyboard Interface
The AT89C51RB2/RC2 implements a keyboard interface allowing the connection of a
8 x n matrix keyboard. It is based on 8 inputs with programmable interrupt capability on
both high or low level. These inputs are available as alternate function of P1 and allow to
exit from idle and power-down modes.
The keyboard interfaces with the C51 core through 3 special function registers: KBLS,
the Keyboard Level Selection register (Table 53), KBE, the Keyboard interrupt Enable
register (Table 52), and KBF, the Keyboard Flag register (Table 51).
Interrupt
The keyboard inputs are considered as 8 independent interrupt sources sharing the
same interrupt vector. An interrupt enable bit (KBD in IEN1) allows global enable or dis-
able of the keyboard interrupt (see Figure 23). As detailed in Figure 24 each keyboard
input has the capability to detect a programmable level according to KBLS. x bit value.
Level detection is then reported in interrupt flags KBF. x that can be masked by software
using KBE. x bits.
This structure allows keyboard arrangement from 1 by n to 8 by n matrix and allow
usage of P1 inputs for other purpose.
Figure 23. Keyboard Interface Block Diagram
VCC
0
P1:x
KBF. x
1
KBE. x
Internal Pull-up
KBLS. x
Figure 24. Keyboard Input Circuitry
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
Input Circuitry
Input Circuitry
Input Circuitry
Input Circuitry
Input Circuitry
Input Circuitry
Input Circuitry
Input Circuitry
KBDIT
Keyboard Interface
Interrupt Request
KBD
IEN1
Power Reduction Mode
P1 inputs allow exit from idle and power down modes as detailed in Section “Power-
down Mode”, page 82.
64
AT89C51RB2/RC2
4180E–8051–10/06
ATMEL [ ATMEL ]
