AT89C51RB2/RC2
Table 48. IPL1 Register
IPL1 - Interrupt Priority Register (B2h)
7
-
6
-
5
-
4
-
3
-
2
1
-
0
SPIL
KBDL
Bit
Bit
Number
Mnemonic Description
Reserved
7
6
5
4
3
2
1
0
-
The value read from this bit is indeterminate. Do not set this bit.
Reserved
-
The value read from this bit is indeterminate. Do not set this bit.
Reserved
-
The value read from this bit is indeterminate. Do not set this bit.
Reserved
-
The value read from this bit is indeterminate. Do not set this bit.
Reserved
-
The value read from this bit is indeterminate. Do not set this bit.
SPI Interrupt Priority Bit
see SPIH for priority level.
SPIL
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Keyboard Interrupt Priority Bit
see KBDH for priority level.
KBDL
Reset Value = XXXX X000b
Bit addressable
61
4180E–8051–10/06
ATMEL [ ATMEL ]
