Table 49. IPH1 Register
IPH1 - Interrupt Priority High Register (B3h)
7
-
6
-
5
-
4
-
3
-
2
1
-
0
SPIH
KBDH
Bit
Bit
Number
Mnemonic Description
Reserved
7
6
5
4
3
-
The value read from this bit is indeterminate. Do not set this bit.
Reserved
-
-
-
-
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
SPI Interrupt Priority High Bit
SPIHSPIL
Priority Level
Lowest
0
0
1
1
0
1
0
1
2
1
0
SPIH
Highest
Reserved
-
The value read from this bit is indeterminate. Do not set this bit.
Keyboard Interrupt Priority High Bit
KB DHKBDL Priority Level
0
0
1
1
0
1
0
1
Lowest
KBDH
Highest
Reset Value = XXXX X000b
Not bit addressable
62
AT89C51RB2/RC2
4180E–8051–10/06
ATMEL [ ATMEL ]
