Mode 0 (13-bit Timer)
Mode 0 configures Timer 0 as an 13-bit Timer which is set up as an 8-bit Timer (TH0
register) with a modulo 32 prescaler implemented with the lower five bits of TL0 register
(See Figure 24). The upper three bits of TL0 register are indeterminate and should be
ignored. Prescaler overflow increments TH0 register.
Figure 24. Timer/Counter x (x= 0 or 1) in Mode 0
See section “Clock”
FTx
Timer x
Interrupt
Request
÷ 6
0
1
Overflow
THx
(8 bits)
TLx
(5 bits)
CLOCK
Tx
TFx
TCON Reg
C/Tx#
TMOD Reg
INTx#
GATEx
TMOD Reg
TRx
TCON Reg
Mode 1 (16-bit Timer)
Mode 1 configures Timer 0 as a 16-bit Timer with TH0 and TL0 registers connected in
cascade (See Figure 25). The selected input increments TL0 register.
Figure 25. Timer/Counter x (x= 0 or 1) in Mode 1
See section “Clock”
FTx
CLOCK
Timer x
Interrupt
Request
÷ 6
0
1
Overflow
THx
(8 bits)
TLx
(8 bits)
TFx
TCON Reg
Tx
C/Tx#
TMOD Reg
INTx#
GATEx
TMOD Reg
TRx
TCON Reg
Mode 2 (8-bit Timer with Auto- Mode 2 configures Timer 0 as an 8-bit Timer (TL0 register) that automatically reloads
Reload)
from TH0 register (See Figure 26). TL0 overflow sets TF0 flag in TCON register and
reloads TL0 with the contents of TH0, which is preset by software. When the interrupt
request is serviced, hardware clears TF0. The reload leaves TH0 unchanged. The next
reload value may be changed at any time by writing it to TH0 register.
56
AT89C5115
4128F–8051–05/06
ATMEL [ ATMEL ]
