Hardware Security Byte
Table 31. Hardware Security byte
7
6
5
-
4
-
3
-
2
1
0
X2B
BLJB
LB2
LB1
LB0
Bit
Bit
Number
Mnemonic Description
X2 bit
7
6
X2B
Set this bit to start in standard mode
Clear this bit to start in X2 Mode.
Boot Loader Jump bit
- 1: To start the user’s application on next RESET (@0000h) located in FM0,
- 0: To start the boot loader(@F800h) located in FM1.
BLJB
Reserved
5 - 3
2 - 0
-
The value read from these bits are indeterminate.
LB2:0
Lock bits (see Table 22)
After erasing the chip in parallel mode, the default value is : FFh
The erasing in ISP mode (from bootloader) does not modify this byte.
Notes: 1. Only the 4 MSB bits can be accessed by software.
2. The 4 LSB bits can only be accessed by parallel mode.
48
AT89C5115
4128F–8051–05/06
ATMEL [ ATMEL ]
