23.3.7
Analog to Digital Converter
23.3.7.1
Definition of Symbols
Table 120. Analog to Digital Converter Timing Symbol Definitions
Signals
Clock
Conditions
High
C
E
H
L
Enable (ADEN bit)
Low
Start Conversion
(ADSST bit)
S
23.3.7.2
Characteristics
Table 37. Analog to Digital Converter AC Characteristics
VDD = 2.7 to 3.3 V, TA = -40 to +85°C
Symbol
Parameter
Clock Period
Min
Max
Unit
µs
TCLCL
TEHSH
TSHSL
4
Start-up Time
4
µs
Conversion Time
11·TCLCL
µs
Differential non-
linearity error(1)(2)
DLe
ILe
1
2
LSB
LSB
Integral non-linearity
errorss(1)(3)
OSe
Ge
Offset error(1)(4)
Gain error(1)(5)
4
4
LSB
LSB
Notes: 1. AVDD= AVREFP= 3.0 V, AVSS= AVREFN= 0 V. ADC is monotonic with no missing code.
2. The differential non-linearity is the difference between the actual step width and the ideal step
width (see Figure 23-20).
3. The integral non-linearity is the peak difference between the center of the actual step and the
ideal transfer curve after appropriate adjustment of gain and offset errors (see Figure 23-20).
4. The offset error is the absolute difference between the straight line which fits the actual trans-
fer curve (after removing of gain error), and the straight line which fits the ideal transfer curve
(see Figure 23-20).
5. The gain error is the relative difference in percent between the straight line which fits the actual
transfer curve (after removing of offset error), and the straight line which fits the ideal transfer
curve (see Figure 23-20).
170
AT89C5132
4173E–USB–09/07
ATMEL [ ATMEL ]
