AT85C51SND3Bx
Bit
Bit
Number
Mnemonic Description
Master Mode Select
4
3
MSTR
CPOL
Set to select the master mode.
Clear to select the slave mode.
SPI Clock Polarity Bit
Set to have the clock output set to high level in idle state.
Clear to have the clock output set to low level in idle state.
SPI Clock Phase Bit
2
CPHA
Set to have the data sampled when the clock returns to idle state (see CPOL).
Clear to have the data sampled when the clock leaves the idle state (see CPOL).
SPI Rate Bits 0 and 1
1-0
SPR1:0
Refer to Table 250 for bit rate description.
Reset Value = 0001 0100b
Table 252. SPSCR Register
SPSCR (1.92h) – SPI Status and Control Register
7
6
5
4
3
2
1
0
SPIF
-
OVR
MODF
SPTE
UARTM
SPTEIE
MODFIE
Bit
Bit
Number
Mnemonic Description
SPI Interrupt Flag
Set by hardware when an 8-bit shift is completed.
7
SPIF
Cleared by hardware to indicate data transfer is in progress or has been
acknowledged by a clearing sequence: reading or writing SPDAT after reading
SPSCR.
Reserved
6
5
-
The value read from this bit is indeterminate. Do not set this bit.
Overrun Error Flag
Set by hardware when a byte is received whereas SPIF is set (the previous
received data is not overwritten).
OVR
Cleared by hardware when reading SPSCR.
Mode Fault Interrupt Flag
Set by hardware to indicate that the SS pin is in inappropriate logic level.
Cleared by hardware when reading SPSCR
When MODF error occurred:
4
MODF
- In slave mode: SPI interface ignores all transmitted data while SS remains high.
A new transmission is perform as soon as SS returns low.
- In master mode: SPI interface is disabled (SPEN=0, see description for SPEN
bit in SPCON register).
Serial Peripheral Transmit register Empty Interrupt Flag
Set by hardware when transmit register is empty (if needed, SPDAT can be
loaded with another data).
Cleared by hardware when transmit register is full (no more data should be
loaded in SPDAT).
3
2
SPTE
Serial Peripheral UART mode
UARTM
Set to select UART mode: data is transmitted LSB first.
Clear to select SPI mode: data is transmitted MSB first.
231
7632A–MP3–03/06
ATMEL [ ATMEL ]
