AIPG2:0
Gain Value
AIPG2:0
Gain Value
AIPG2:0
Gain Value
001
+6 dB
011
+18 dB
≥ 101
Reserved
Line Inputs Preamplifier Gain
In AT85C51SND3B2 & AT85C51SND3B3, when Line Inputs are selected as output
source (e.g. FM decoder playback) two preamplifier gain values can be applied by set-
ting or clearing AILPG bit in ACIPG according to Table 161.
Table 161. Audio Codec Line Inputs Preamplifier Gain
AILPG
Gain Value
+6 dB
0
1
+12 dB
Microphone Bias
In addition, voltage supply function for an electret type microphone is integrated deliver-
ing High bias (1.5V) or low bias (2v) voltage. The high bias voltage output is only
available in high power supply configuration, while the low bias voltage output is avail-
able in low or high voltage power supply configurations. Bias voltage output is selected
by AMBSEL bit in ACCON according to Table 163 and is enabled by AMBEN bit in
ACCON according to Table 162.
Table 162. Audio Codec Microphone Bias Control
AMBEN
Control
0
1
Microphone bias output disabled
Microphone bias output enabled
Table 163. Audio Codec Microphone Bias Voltage Selection
AMBSEL
Voltage Selection
0
1
high bias voltage 2V output
Low bias voltage 1.5 V output
Audio DAC Interface
The C51 core interfaces to the audio DAC interface through two special function regis-
ters: ADICON0 and ADICON1, the Audio DAC Interface Control registers (see
Table 182 and Table 183).
Figure 75 shows the audio interface block diagram where blocks are detailed in the fol-
lowing sections.
156
AT85C51SND3Bx
7632A–MP3–03/06
ATMEL [ ATMEL ]
