AT85C51SND3Bx
Table 76. IPL0 Register
IPL0 (0.B8h) - Interrupt Priority Low Register 0
7
6
5
4
3
2
1
0
-
IPLAUP
IPLDFC
IPLS
IPLT1
IPLX1
IPLT0
IPLX0
Bit
Bit
Number
Mnemonic Description
Reserved
7
6
5
4
3
2
1
0
-
The value read from this bit is indeterminate. Do not set this bit.
AUP Interrupt Priority Level Lsb
IPLAUP
IPLDFC
IPLS
Refer to Table 70 for priority level description.
DFC Interrupt Priority Level Lsb
Refer to Table 70 for priority level description.
SIO Interrupt Priority Level Lsb
Refer to Table 70 for priority level description.
T1 Interrupt Priority Level Lsb
IPLT1
Refer to Table 70 for priority level description.
EX1 Interrupt Priority Level Lsb
IPLX1
IPLT0
Refer to Table 70 for priority level description.
T0 Interrupt Priority Level Lsb
Refer to Table 70 for priority level description.
EX0 Interrupt Priority Level Lsb
IPLX0
Refer to Table 70 for priority level description.
Reset Value = X000 0000b
63
7632A–MP3–03/06
ATMEL [ ATMEL ]
