AT85C51SND3Bx
Bit
Bit
Number
Mnemonic Description
VBUS Transition Interrupt Enable Bit
Set this bit to enable the VBUS Transition interrupt generation.
Clear this bit to disable the VBUS Transition interrupt generation.
0
VBUSTE
Reset Value = 0010 0000b
Table 103. USBSTA Register
USBSTA (1.E2h) – USB General Status Register
7
6
5
4
3
2
1
0
-
-
-
-
-
SPEED
ID
VBUS
Bit
Bit
Number
Mnemonic Description
Reserved
7-3
2
-
The value read from these bits is always 0. Do not set these bits.
Speed Status Flag
SPEED
ID
Set by hardware when the controller is in HIGH-SPEED mode.
Cleared by hardware when the controller is in FULL-SPEED mode.
IUD Pin Flag
1
Set / cleared by hardware and reflects the state of the UID pin.
VBus Flag
0
VBUS
Set / cleared by hardware and reflects the level of the UVCC pin.
See Section “Plug-in detection” for more details.
Reset Value = 0000 0000b
Table 104. USBINT Register
USBINT (1.E3h) – USB Global Interrupt Register
7
6
5
4
3
2
1
0
-
-
-
-
-
-
IDTI
VBUSTI
Bit
Bit
Number
Mnemonic Description
Reserved
7-2
1
-
The value read from these bits is always 0. Do not set these bits.
ID Transition Interrupt Flag
Set by hardware when a transition (high to low, low to high) has been detected
on the UID pin.
IDTI
Shall be cleared by software.
VBUS Transition Interrupt Flag
Set by hardware when a transition (high to low, low to high) has been detected
on the UVCC pin.
0
VBUSTI
Shall be cleared by software.
Reset Value = 0000 0000b
95
7632A–MP3–03/06
ATMEL [ ATMEL ]
