Figure 14. Lower 128 Bytes Internal RAM Organization
7Fh
30h
2Fh
Bit-Addressable Space
(Bit Addresses 0-7Fh)
20h
18h
10h
08h
00h
1Fh
17h
0Fh
07h
4 Banks of
8 Registers
R0-R7
Upper 128 Bytes RAM
Expanded RAM
The upper 128 Bytes of RAM are accessible from address 80h to FFh using only indirect
addressing mode.
The on-chip 2K Bytes of expanded RAM (ERAM) are accessible from address 0000h to
07FFh using indirect addressing mode through MOVX instructions. In this address
range, EXTRAM bit in AUXR register (see Table 30) is used to select the ERAM
(default) or the XRAM. As shown in Figure 13 when EXTRAM = 0, the ERAM is selected
and when EXTRAM = 1, the XRAM is selected (see Section “External Space”).
The ERAM memory can be resized using XRS1:0 bits in AUXR register to dynamically
increase external access to the XRAM space. Table 27 details the selected ERAM size
and address range.
Table 27. ERAM Size Selection
XRS1
XRS0
ERAM Size
256 Bytes
512 Bytes
1K Byte
Address
0
0
1
1
0
1
0
1
0 to 00FFh
0 to 01FFh
0 to 03FFh
0 to 07FFh
2K Bytes
Note:
Lower 128 Bytes RAM, Upper 128 Bytes RAM, and expanded RAM are made of volatile
memory cells. This means that the RAM content is indeterminate after power-up and
must then be initialized properly.
24
AT8xC51SND2C
4341D–MP3–04/05
ATMEL [ ATMEL ]
