Waveforms
Figure 153. External Program Bus Cycle - Read Waveforms
ALE
TLHLL
TPLPH
TLLPL
PSEN
TPLIV
TPXAV
TPXIZ
TPLAZ
TAVLL TLLAX
TPXIX
P0
P2
D7:0
A7:0
D7:0
Instruction In
A7:0
D7:0
Instruction In
A15:8
A15:8
External Data 8-bit Bus Cycles
Definition of Symbols
Table 190. External Data 8-bit Bus Cycles Timing Symbol Definitions
Signals
Address
Conditions
A
D
L
H
L
High
Data In
ALE
Low
V
X
Z
Valid
Q
R
W
Data Out
RD
No Longer Valid
Floating
WR
Timings
Test conditions: capacitive load on all pins= 50 pF.
Table 191. External Data 8-bit Bus Cycle - Read AC Timings
DD = 2.7 to 3.3 V, TA = -40 to +85°C
V
Variable Clock
Standard Mode
Variable Clock
X2 Mode
Symbol
Parameter
Min
Max
Min
Max
Unit
ns
TCLCL Clock Period
50
50
TLHLL ALE Pulse Width
2·TCLCL-15
TCLCL-20
TCLCL-20
3·TCLCL-30
TCLCL-15
ns
TAVLL
Address Valid to ALE Low
0.5·TCLCL-20
0.5·TCLCL-20
1.5·TCLCL-30
ns
TLLAX Address hold after ALE Low
TLLRL ALE Low to RD Low
ns
ns
214
AT8xC51SND2C
4341D–MP3–04/05
ATMEL [ ATMEL ]
