Table 136. External Data Memory Interface Signals
Signal
Name
Alternate
Function
Type Description
Address Lines
A15:8
I/O Upper address lines for the external bus.
Multiplexed higher address and data lines for the IDE interface.
P2.7:0
P0.7:0
-
Address/Data Lines
Multiplexed lower address and data lines for the IDE interface.
AD7:0
ALE
I/O
Address Latch Enable
O
ALE signals indicates that valid address information is available on lines
AD7:0.
Read
RD
O
O
P3.7
P3.6
Read signal output to external data memory.
Write
WR
Write signal output to external memory.
Registers
Table 137. DAT16H Register
DAT16H (S:F9h) – Data 16 High Order Byte
7
6
5
4
3
2
1
0
D15
D14
D13
D12
D11
D10
D9
D8
Bit
Bit
Number
Mnemonic Description
Data 16 High Order Byte
When EXT16 bit is set, DAT16H is set by software with the high order data Byte
prior any MOVX write instruction.
7 - 0
D15:8
When EXT16 bit is set, DAT16H contains the high order data Byte after any
MOVX read instruction.
Reset Value =XXXX XXXXb
134
AT8xC51SND2C
4341D–MP3–04/05
ATMEL [ ATMEL ]
