TS68EN360
Table 7-6.
GND = 0 VDC, TC = -55 to +125°C. The electrical specifications in this document are preliminary
(See Figure 7-3 to Figure 7-19) (Continued)
25 MHz
33.34 MHz
Number
Characteristic
Symbol
Min
Max
Min
Max
Unit
R/W Width Asserted (Fast Termination Write or
Read)
46A
tRWAS
75
–
56
–
ns
47A
47B
Asynchronous Input Setup Time
tAIST
tAIHT
tDABA
tDOCH
5
10
–
–
–
4
7.5
–
–
–
ns
ns
ns
ns
Asynchronous Input Hold Time
48(5)(7)
DSACKx Asserted to BERR, HALT Asserted
Data-Out, Parity-Out Hold from CLKO1 High
30
–
22.5
–
53
0
0
CLKO1 High to Dat-Out, Parity-Out High
Impedance
54
tCHDH
–
20
–
15
ns
55
56
R/W Asserted to Data Bus Impedance Change
RESET Pulse Width (Reset Instruction)
tRADC
tHRPW
tRPWI
tBNHN
25
512
20
0
–
–
–
–
19
512
20
0
–
–
–
–
ns
CLKO1
CLKO1
ns
56A
57
RESET Pulse Width (Input from External Device)
BERR Negated to HALT Negated (Return)
CLKO1 High to BERR, RESETS, RESETH Driven
Low
58
tCHBRL
tCLRL
tCLRL
–
–
–
30
30
20
26
26
15
ns
ns
ns
CLKO1 Low RESETS Driven Low (upon Reset
Instruction execution only)
58A
58B
CLKO1 High to BERR, RESETS, RESETH
tri-stated
–
60
61
CLKO1 High to BCLRO Asserted
CLKO1 High to BCLRO Negated
BR Synchronous Setup Time
tCHBCA
tCHBCN
tBRSU
tBRH
–
–
20
20
–
–
–
15
15
–
ns
ns
62(9)
63(9)
64(9)
65(9)
66
5
3.75
7.5
3.75
7.5
5
ns
BR Synchronous Hold Time
10
5
–
–
ns
BGACK Synchronous Setup Time
BGACK Synchronous Hold Time
BR Low to CLKO1 Rising Edge (040 comp. mode)
CLKO1 Low to Data Bus Driven (Show Cycle)
Data Setup Time to CLKO1 Low (Show Cycle)
Data Hold from CLKO1 Low (Show Cycle)
BKPT Input Setup Time
tBGSU
tBGH
–
–
ns
10
5
–
–
ns
tBRCH
tSCLDD
tSCLDS
tSCLDH
tBKST
tBKHT
tMST
–
–
ns
70
0
30
–
0
22.5
–
ns
71
10
6
7.5
3.75
7.5
3.75
–
ns
72
–
–
ns
73
10
6
–
–
ns
74
BKPT Input Hold Time
–
–
ns
75
RESETH Low to Config2-0, MOD1-0, B16M Valid
Config2-0
–
500
–
500
–
CLKO1
ns
76
tMSH
0
0
77
MOD1-0 Hold Time, B16M Hold Time
DSI Input Setup Time
tMSH
10
10
6
–
10
–
CLKO1
ns
80
tDSISU
tDSIH
–
7.5
3.75
7.5
–
81
DSI Input Hold Time
–
–
ns
82
DSCLC Setup Time
tDSCSU
10
–
–
ns
21
2113B–HIREL–06/05