TS68EN360
Figure 7-5. Read Cycle (With Parity Check, PBEE = 1)
S0
S1
S2
S3
S4
S5
CLKO1
(OUTPUT)
6
8
A31-A0, FC3-FC0,
SIZ1-SIZ0 (OUTPUT)
RMC
(OUTPUT)
11
16
14
AS
(OUTPUT)
12
9
13
DS
(OUTPUT)
15
9A
CSx
(OUTPUIT)
OE
(OUTPUT)
21
20
18
R/W
(OUTPUT)
46
31A
DSACK0
(I/O)
47A
28
DSACK1
(I/O)
PRTY0-PRTY3
(INPUT)
29
31B
D31-D0
(INPUT)
29A
27B
BERR
(INPUT)
48
27A
HALT
(INPUT)
9
12
12
IFETCH
(OUTPUT)
47A
47B
IPIPE1,0
(OUTPUT)
ASYNCHRONOUS
INPUTS
73
74
BKPT
(INPUT)
Note:
All timing is shown with respect to 0.8V and 2.0V levels.
25
2113B–HIREL–06/05