欢迎访问ic37.com |
会员登录 免费注册
发布采购

5962-9760702MXC 参数 Datasheet PDF下载

5962-9760702MXC图片预览
型号: 5962-9760702MXC
PDF下载: 下载PDF文件 查看货源
内容描述: [RISC Microprocessor, 32-Bit, 33MHz, CMOS, CPGA241, CERAMIC, PGA-241]
分类和应用: 时钟ATM异步传输模式外围集成电路
文件页数/大小: 83 页 / 999 K
品牌: ATMEL [ ATMEL ]
 浏览型号5962-9760702MXC的Datasheet PDF文件第15页浏览型号5962-9760702MXC的Datasheet PDF文件第16页浏览型号5962-9760702MXC的Datasheet PDF文件第17页浏览型号5962-9760702MXC的Datasheet PDF文件第18页浏览型号5962-9760702MXC的Datasheet PDF文件第20页浏览型号5962-9760702MXC的Datasheet PDF文件第21页浏览型号5962-9760702MXC的Datasheet PDF文件第22页浏览型号5962-9760702MXC的Datasheet PDF文件第23页  
TS68EN360  
7.7  
Bus Operation AC Timing Specifications  
Table 7-6.  
GND = 0 VDC, TC = -55 to +125°C. The electrical specifications in this document are preliminary  
(See Figure 7-3 to Figure 7-19)  
25 MHz  
33.34 MHz  
Number  
Characteristic  
Symbol  
tCHAV  
Min  
Max  
15  
Min  
Max  
12  
Unit  
ns  
6
CLKO1 High to Address, FC, SIZ, RMC Valid  
CLKO1 High to Address Valid (GAMX = 1)  
0
0
0
0
6A  
tCHAV  
20  
15  
ns  
CLKO1 High to Address, Data, FC, SIZ, RMC High  
Impedance  
7
8
9
tCHAZx  
tCHAZn  
tCLSA  
0
-2  
3
40  
0
-2  
3
30  
ns  
ns  
ns  
CLKO1 High to Address, Data, FC, SIZ, RMC  
Invalid  
CLKO1 Low to AS, DS, OE, WE, IFETCH, IPIPE,  
IACKx Asserted  
20  
15  
9(10)  
CLKO1 Low to CSx/RASx Asserted  
CLKO1 High to CSx/RASx Asserted  
AS to DS or CSx/RASx or OE Asserted (Read)  
AS to CSx/RASx Asserted  
tCLSA  
tCHCA  
tSTSA  
tSTCA  
4
4
16  
16  
6
4
12  
12  
ns  
ns  
ns  
ns  
9B(11)  
4
-5.625  
9
9A(2)(10)  
9C(2)(11)  
-6  
14  
5.625  
21  
26  
Address, FC, SIZ, RMC, valid to AS, CSx/RASx,  
OE, WE, (and DS Read) Asserted  
11(10)  
11A(11)  
12  
tAVSA  
tAVCA  
tCLSN  
10  
30  
3
8
22.5  
3
ns  
ns  
ns  
Address, FC, SIZ, RMC, Valid to CSx/RASx  
Asserted  
CLKO1 Low to AS, DS, OE, WE, IFETCH, IPIPE,  
IACKx Negated  
20  
15  
12(16)  
12A(13)(16)  
12B  
CLKO1 Low to CSx/RASx Negated  
CLKO1 High to CSx/RASx Negated  
CS negate to WE negate (CSNTQ = 1)  
tCLSN  
tCHCN  
4
4
16  
16  
4
4
12  
12  
ns  
ns  
ns  
AtmelTW  
15  
12  
AS, DS, CSx, OE, WE, IACKx Negated to Address,  
FC, SIZ Invalid (Address Hold)  
13(12)  
tSNAI  
tCNAI  
10  
30  
7.5  
ns  
ns  
CSx Negated to Address, FC, SIZ, Invalid (Address  
Hold)  
13A(13)  
22.5  
14(10)(12)  
14C(11)(13)  
14A  
AS, CSx, OE, WE (and DS Read) Width Asserted  
CSx Width Asserted  
tSWA  
tCWA  
75  
35  
35  
56.25  
26.25  
26.25  
ns  
ns  
ns  
DS Width Asserted (Write)  
tSWAW  
AS, CSx, OE, WE, IACKx, (and DS Read) Width  
Asserted (Fast Termination Cycle)  
14B  
tSWDW  
35  
26.25  
ns  
14D(13)  
CSx Width Asserted (Fast Termination Cycle)  
tCWDW  
tSN  
15  
35  
10  
26.25  
ns  
ns  
ns  
ns  
ns  
ns  
15(3)(10)(12) AS, DS, CSx, OE, WE Width Negated  
16  
17(12)  
17A(13)  
18  
CLKO1 High to AS, DS, R/W High Impedance  
AS, DS, CSx, WE Negated to R/W High  
CSx Negated to R/W High  
tCHSZ  
tSNRN  
tCNRN  
tCHRH  
40  
30  
10  
30  
0
7.5  
22.5  
0
CLKO1 High to R/W High  
20  
15  
19  
2113B–HIREL–06/05  
 复制成功!