AS1524/AS1525
Datasheet - Detailed Description
8 Detailed Description
The AS1524/AS1525 employ a successive approximation conversion (SAR) technique and integrated track/hold cir-
cuitry to convert analog signals into 12-bit digital output. The serial interface provides easy interfacing to microproces-
sors. Figure 18 shows the simplified internal structure for the AS1525 (2-channels, single ended) and the AS1524
(1-channel, true differential).
True Differential Analog Input Track/Hold
The equivalent circuit of Figure 18 shows the device input architecture which is composed of track/hold circuitry, input
multiplexer, comparator, and switched-capacitor DAC. The track/hold circuitry enters its tracking mode on the rising
edge of CNVST. The positive input capacitor is connected to AIN1 or AIN2 (AS1525) or AIN+ (AS1524). The negative
input capacitor is connected to GND (AS1525) or AIN- (AS1524).
Figure 18. Equivalent Input Circuit
REF
12-Bit Capacitive DAC
GND
AIN2
AIN1/AIN+
CIN+
+
Hold
CIN-
–
GND/AIN-
Comparator
RIN-
RIN+
Hold
Hold
VDD/2
Track
The track/hold circuitry enters its hold mode on the falling edge of CNVST and the difference between the sampled
positive and negative input voltages is converted. The time required for the track/hold to acquire an input signal is
determined by how quickly its input capacitance is charged. If the input signal’s source impedance is high, the acquisi-
tion time lengthens, and CNVST must be held high for a longer period of time. The acquisition time (tACQ) is the maxi-
mum time needed for the signal to be acquired, plus the power-up time. tACQ is calculated by:
tACQ = 9 x (RS + RIN) x 20pF + tPWR
(EQ 1)
Where:
RS is the source impedance of the input signal;
RIN = 1.5kΩ;
tPWR of 1µs is the power-up time of the device.
Note: tACQ is never less than 1.4µs and any source impedance below 300. does not significantly affect the AS1524/
AS1525 AC performance. A high-impedance source can be accommodated either by lengthening tACQ or by
placing a 1µF capacitor between the positive and negative analog inputs.
Selecting AIN1 or AIN2 (AS1525)
Select one of the AS1525 two positive input channels using the CNVST pin (see page 3). If AIN1 is selected (see Fig-
ure 19), drive CNVST high to power up the AS1525 and place the track/hold circuitry in track mode with AIN1 con-
nected to the positive input capacitor. Hold CNVST high for tACQ to fully acquire the signal. Drive CNVST low to place
the track/hold circuitry in hold mode. The AS1525 then performs a conversion and shutdown automatically. The MSB is
available at DOUT after 3.7µs. Data can then be clocked out using SCLK. Clock out all 12 bits of data before driving
CNVST high for the next conversion. If all 12 bits of data are not clocked out before CNVST is driven high, AIN2 is
selected for the next conversion.
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