A625308A Series
Block Diagram
VCC
GND
A0
ROW
512 X 512
A12
A13
A14
DECODER
MEMORY ARRAY
I/O0
COLUMN I/O
INPUT DATA
CIRCUIT
I/O7
CE
OE
CONTROL
CIRCUIT
WE
Pin Description-TSOP
Pin No.
Pin Descriptions – DIP / SOP
Symbol
A0 - A14
Description
Address Input
Data Input/Output
Chip Enable
Pin No.
1-10, 21, 23-26
11-13, 15-19
20
Symbol
A0 - A14
I/O0 - I/O7
Description
2-5, 8-17, 28
18-20, 22-26
27
Address Input
Data Input/Output
Chip Enable
I/O0 - I/O7
CE
CE
OE
1
6
Output Enable
Write Enable
22
27
Output Enable
Write Enable
OE
WE
VCC
GND
WE
VCC
GND
7
Power Supply
Ground
28
14
Power Supply
Ground
21
PRELIMINARY
(July, 2002, Version 0.2)
2
AMIC Technology, Inc.