A49FL004
Figure 18: A/A Mux Mode Byte Program Timing Diagram
Four-Byte Byte Program Command Sequence
5555
2AAA
5555
PA
Address
R/C
OE
TWP
TWPH
TBP
WE
High-Z
AA
55
A0
PD
I/O7-I/O0
Byte Program Command Input
Byte Program Operation In Progress
PA = Byte Program Address
PD = Byte Program Data
Figure 19: A/A Mux Mode Block Erase Timing Diagram
Six-Byte Block Erase Command Sequence
2AAA 5555 5555 2AAA
5555
BA
Address
R/C
OE
TWP TWPH
TBE
WE
High-Z
AA
55
80
AA
55
30/50
I/O7-I/O0
Block Erase Command Input
Block Erase Operation In Progress
BA = Block Address
PRELIMINARY
(September, 2005, Version 0.0)
27
AMIC Technology, Corp.
AMICC [ AMIC TECHNOLOGY ]
