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A43E26161 参数 Datasheet PDF下载

A43E26161图片预览
型号: A43E26161
PDF下载: 下载PDF文件 查看货源
内容描述: 1M ×16位×4银行低功耗同步DRAM [1M X 16 BIT X 4 BANKS LOW POWER SYNCHRONOUS DRAM]
分类和应用: 动态存储器
文件页数/大小: 44 页 / 1119 K
品牌: AMICC [ AMIC TECHNOLOGY ]
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A43E26161  
AC Operating Test Conditions  
(VDD = 1.7V~1.95V, TA = 0°C to +70°C or TA = -25ºC to +85ºC)  
Parameter  
Value  
Unit  
V
AC input levels  
0.9 x VDDQ/0.2  
0.5 x VDDQ  
tr/tf = 1/1  
Input timing measurement reference level  
Input rise and all time (See note3)  
Output timing measurement reference level  
Output load condition  
V
ns  
V
0.5 x VDDQ  
See Fig.2  
1.8V  
VOH(DC) = VDDQ-0.2V, IOH = -0.1mA  
13.9KVOL(DC) = 0.2V, IOL = 0.1mA  
VTT =0.5V x VDDQ  
50Ω  
Output  
ZO=50Ω  
OUTPUT  
30pF  
10.6KΩ  
30pF  
(Fig. 2) AC Output Load Circuit  
(Fig. 1) DC Output Load Circuit  
AC Characteristics  
(AC operating conditions unless otherwise noted)  
-95  
Symbol  
Parameter  
Unit  
Max  
Note  
Min  
CL=3  
CL=2  
CL=3  
CL=2  
9.5  
15  
-
tCC  
CLK cycle time  
1000  
ns  
1
7
8
-
CLK to valid  
Output delay  
tSAC  
tOH  
tCH  
ns  
ns  
ns  
1,2  
2
-
Output data hold time  
2.5  
3.5  
3.5  
3.5  
3.5  
3
CL=3  
CL=2  
CL=3  
CL=2  
CL=3  
CL=2  
-
CLK high pulse width  
3
-
-
tCL  
tSS  
CLK low pulse width  
ns  
ns  
3
3
-
-
Input setup time  
Input hold time  
3
-
tSH  
1.5  
1
-
ns  
ns  
3
2
tSLZ  
CLK to output in Low-Z  
-
CL=3  
CL=2  
-
7
8
tSHZ  
CLK to output in Hi-Z  
ns  
-
CL=CAS Latency.  
*All AC parameters are measured from half to half.  
Note : 1. Parameters depend on programmed CAS latency.  
2. If clock rising time is longer than 1ns, (tr/2-0.5)ns should be added to the parameter.  
3. Assumed input rise and fall time (tr & tf) = 1ns.  
If tr & tf is longer than 1ns, transient time compensation should be considered,  
i.e., [(tr + tf)/2-1]ns should be added to the parameter.  
(December, 2004, Version 1.0)  
6
AMIC Technology, Corp.  
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