A43E26161
Pin Configuration (continued)
ꢀ54 TSOP (II)
54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28
A43E26161
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
Block Diagram
LWE
Data Input Register
Bank Select
DQM
1M X 16
1M X 16
1M X 16
CLK
DQi
1M X 16
Column Decoder
ADD
Latency & Burst Length
LRAS
Programming Register
LWCBR
LCAS
DQM
LRAS
LCBR LWE
Timing Register
RAS
DQM
CLK
CKE
CS
CAS
WE
(December, 2004, Version 1.0)
2
AMIC Technology, Corp.