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A43E26161 参数 Datasheet PDF下载

A43E26161图片预览
型号: A43E26161
PDF下载: 下载PDF文件 查看货源
内容描述: 1M ×16位×4银行低功耗同步DRAM [1M X 16 BIT X 4 BANKS LOW POWER SYNCHRONOUS DRAM]
分类和应用: 动态存储器
文件页数/大小: 44 页 / 1119 K
品牌: AMICC [ AMIC TECHNOLOGY ]
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A43E26161  
Read Interrupted by Precharge Command & Read Burst Stop Cycle @Burst Length=Full Page  
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1
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3
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9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
CLOCK  
CKE  
High  
CS  
RAS  
CAS  
RAa  
CAa  
CAb  
ADDR  
BS1  
BS0  
RAa  
A10/AP  
WE  
DQM  
1
1
DQ  
(CL=2)  
QAa1 QAa2 QAa3 QAa4  
QAb0 QAb1 QAb2 QAb3 QAb4 QAb5  
QAa0  
2
2
DQ  
(CL=3)  
QAa0 QAa1 QAa2 QAa3 QAa4  
QAb0 QAb1 QAb2 QAb3 QAb4 QAb5  
Read  
(A-Bank)  
Read  
(A-Bank)  
Precharge  
(A-Bank)  
Row Active  
(A-Bank)  
Burst Stop  
: Don't care  
* Note : 1. At full page mode, burst is wrap-around at the end of burst. So auto precharge is impossible.  
2. About the valid DQ’s after burst stop, it is same as the case of  
interrupt.  
RAS  
Both cases are illustrated above timing diagram. See the label 1,2 on them.  
But at burst write, burst stop and interrupt should be compared carefully.  
RAS  
Refer the timing diagram of “Full page write burst stop cycle”.  
3. Burst stop is valid at every burst length.  
(December, 2004, Version 1.0)  
31  
AMIC Technology, Corp.  
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