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A29002TL-70 参数 Datasheet PDF下载

A29002TL-70图片预览
型号: A29002TL-70
PDF下载: 下载PDF文件 查看货源
内容描述: 256K ×8位CMOS 5.0伏只,引导扇区闪存 [256K X 8 Bit CMOS 5.0 Volt-only, Boot Sector Flash Memory]
分类和应用: 闪存
文件页数/大小: 32 页 / 314 K
品牌: AMICC [ AMIC TECHNOLOGY ]
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A29002/A290021 Series  
I/O3: Sector Erase Timer  
After writing a sector erase command sequence, the  
system may read I/O3 to determine whether or not an  
erase operation has begun. (The sector erase timer does  
not apply to the chip erase command.) If additional  
sectors are selected for erasure, the entire time-out also  
applies after each additional sector erase command.  
When the time-out is complete, I/O3 switches from "0" to  
"1." The system may ignore I/O3 if the system can  
guarantee that the time between additional sector erase  
commands will always be less than 50ms. See also the  
"Sector Erase Command Sequence" section.  
START  
Read I/O7-I/O0  
Read I/O7-I/O0  
(Note 1)  
After the sector erase command sequence is written, the  
system should read the status on I/O7 (  
Polling) or  
Data  
I/O6 (Toggle Bit 1) to ensure the device has accepted the  
command sequence, and then read I/O3. If I/O3 is "1", the  
internally controlled erase cycle has begun; all further  
commands (other than Erase Suspend) are ignored until  
the erase operation is complete. If I/O3 is "0", the device  
will accept additional sector erase commands. To ensure  
the command has been accepted, the system software  
should check the status of I/O3 prior to and following each  
subsequent sector erase command. If I/O3 is high on the  
second status check, the last command might not have  
been accepted. Table 6 shows the outputs for I/O3.  
No  
Toggle Bit  
= Toggle ?  
Yes  
No  
I/O5 = 1?  
Yes  
Read I/O7 - I/O0  
(Notes 1,2)  
Twice  
No  
Toggle Bit  
= Toggle ?  
Yes  
Program/Erase  
Operation Not  
Commplete, Write  
Reset Command  
Program/Erase  
Operation Complete  
Notes :  
1. Read toggle bit twice to determine whether or not it is  
toggling. See text.  
2. Recheck toggle bit because it may stop toggling as I/O5  
changes to "1". See text.  
Figure 5. Toggle Bit Algorithm  
(February, 2002, Version 1.0)  
14  
AMIC Technology, Inc.  
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