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A29002TL-70 参数 Datasheet PDF下载

A29002TL-70图片预览
型号: A29002TL-70
PDF下载: 下载PDF文件 查看货源
内容描述: 256K ×8位CMOS 5.0伏只,引导扇区闪存 [256K X 8 Bit CMOS 5.0 Volt-only, Boot Sector Flash Memory]
分类和应用: 闪存
文件页数/大小: 32 页 / 314 K
品牌: AMICC [ AMIC TECHNOLOGY ]
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A29002/A290021 Series  
Table 5. A29002/A290021 Command Definitions  
Bus Cycles (Notes 2 - 4)  
Command  
Sequence  
(Note 1)  
First  
Addr Data Addr  
Second  
Third  
Fourth  
Fifth  
Sixth  
Data  
Addr Data  
Addr Data  
Addr Data Addr Data  
Read (Note 5)  
Reset (Note 6)  
1
1
4
4
RA  
RD  
XXX F0  
555 AA  
555 AA  
Manufacturer ID  
2AA  
2AA  
55  
55  
555  
555  
90  
90  
X00  
X01  
37  
Autoselect  
(Note 7)  
Top  
Bottom  
8C  
0D  
Device ID  
7F  
Continuation ID  
4
4
555 AA  
555 AA  
2AA 55  
555  
555  
90  
90  
X03  
00  
Sector Protect Verify  
(Note 8)  
SA  
X02  
2AA  
55  
01  
Program  
4
6
6
1
1
AA  
555  
2AA  
2AA  
2AA  
55  
55  
55  
555 A0  
PA  
555  
555  
PD  
Chip Erase  
Sector Erase  
555 AA  
555 AA  
XXX B0  
XXX 30  
555  
555  
80  
80  
AA  
AA  
2AA  
2AA 55  
55  
555  
SA  
10  
30  
Erase Suspend (Note 9)  
Erase Resume (Note 10)  
Legend:  
X = Don't care  
RA = Address of the memory location to be read.  
RD = Data read from location RA during read operation.  
PA = Address of the memory location to be programmed. Addresses latch on the falling edge of the  
whichever happens later.  
or  
pulse,  
CE  
WE  
PD = Data to be programmed at location PA. Data latches on the rising edge of  
or  
pulse, whichever happens first.  
CE  
WE  
SA = Address of the sector to be verified (in autoselect mode) or erased. Address bits A17 - A13 select a unique sector.  
Note:  
1. See Table 1 for description of bus operations.  
2. All values are in hexadecimal.  
3. Except when reading array or autoselect data, all bus cycles are write operation.  
4. Address bits A17 - A12 are don't cares for unlock and command cycles, unless SA or PA required.  
5. No unlock or command cycles required when reading array data.  
6. The Reset command is required to return to reading array data when device is in the autoselect mode, or if I/O5 goes high  
(while the device is providing status data).  
7. The fourth cycle of the autoselect command sequence is a read cycle.  
8. The data is 00h for an unprotected sector and 01h for a protected sector. See "Autoselect Command Sequence" for more  
information.  
9. The system may read and program in non-erasing sectors, or enter the autoselect mode, when in the Erase Suspend  
mode.  
10. The Erase Resume command is valid only during the Erase Suspend mode.  
11. The time between each command cycle has to be less than 50ms.  
(February, 2002, Version 1.0)  
11  
AMIC Technology, Inc.  
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