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A29002TL-70 参数 Datasheet PDF下载

A29002TL-70图片预览
型号: A29002TL-70
PDF下载: 下载PDF文件 查看货源
内容描述: 256K ×8位CMOS 5.0伏只,引导扇区闪存 [256K X 8 Bit CMOS 5.0 Volt-only, Boot Sector Flash Memory]
分类和应用: 闪存
文件页数/大小: 32 页 / 314 K
品牌: AMICC [ AMIC TECHNOLOGY ]
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A29002/A290021 Series  
Write Operation Status  
Several bits, I/O2, I/O3, I/O5, I/O6, and I/O7, are provided in  
the A29002/A290021 to determine the status of a write  
operation. Table 6 and the following subsections describe  
the functions of these status bits. I/O7, I/O6 and I/O2 each  
offer a method for determining whether a program or erase  
operation is complete or in progress. These three bits are  
discussed first.  
START  
Read I/O7-I/O0  
Address = VA  
I/O7:  
Polling  
Data  
The  
Polling bit, I/O7, indicates to the host system  
Data  
whether an Embedded Algorithm is in progress or  
completed, or whether the device is in Erase Suspend.  
Yes  
I/O7 = Data ?  
Polling is valid after the rising edge of the final  
Data  
pulse in the program or erase command sequence.  
WE  
During the Embedded Program algorithm, the device  
outputs on I/O7 the complement of the datum programmed  
to I/O7. This I/O7 status also applies to programming during  
Erase Suspend. When the Embedded Program algorithm  
is complete, the device outputs the datum programmed to  
I/O7. The system must provide the program address to  
read valid status information on I/O7. If a program address  
No  
I/O5 = 1?  
Yes  
No  
falls within a protected sector,  
Polling on I/O7 is  
Data  
active for approximately 2ms, then the device returns to  
reading array data.  
Read I/O7 - I/O0  
Address = VA  
During the Embedded Erase algorithm,  
produces a "0" on I/O7. When the Embedded Erase  
Polling  
Data  
algorithm is complete, or if the device enters the Erase  
Suspend mode,  
Polling produces a "1" on I/O7.This  
Data  
is analogous to the complement/true datum output  
described for the Embedded Program algorithm: the erase  
function changes all the bits in a sector to "1"; prior to this,  
the device outputs the "complement," or "0." The system  
must provide an address within any of the sectors selected  
for erasure to read valid status information on I/O7.  
Yes  
I/O7 = Data ?  
After an erase command sequence is written, if all sectors  
No  
selected for erasing are protected,  
Polling on I/O7 is  
Data  
active for approximately 100ms, then the device returns to  
reading array data. If not all selected sectors are protected,  
the Embedded Erase algorithm erases the unprotected  
sectors, and ignores the selected sectors that are  
protected.  
FAIL  
PASS  
When the system detects I/O7 has changed from the  
complement to true data, it can read valid data at I/O7 - I/O0  
on the following read cycles. This is because I/O7 may  
change asynchronously with I/O0 - I/O6 while Output Enable  
Note :  
1. VA = Valid address for programming. During a sector  
erase operation, a valid address is an address within any  
sector selected for erasure. During chip erase, a valid  
address is any non-protected sector address.  
2. I/O7 should be rechecked even if I/O5 = "1" because  
I/O7 may change simultaneously with I/O5.  
(
) is asserted low. The  
Polling Timings (During  
Data  
OE  
Embedded Algorithms) figure in the "AC Characteristics"  
section illustrates this. Table 6 shows the outputs for  
Data  
Polling algorithm.  
Polling on I/O7. Figure 4 shows the  
Data  
Figure 4. Data Polling Algorithm  
(February, 2002, Version 1.0)  
12  
AMIC Technology, Inc.  
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