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A25L080Q4-UFG 参数 Datasheet PDF下载

A25L080Q4-UFG图片预览
型号: A25L080Q4-UFG
PDF下载: 下载PDF文件 查看货源
内容描述: 16Mbit的低电压,串行闪存的100MHz统一4KB扇区 [16Mbit Low Voltage, Serial Flash Memory With 100MHz Uniform 4KB Sectors]
分类和应用: 闪存
文件页数/大小: 43 页 / 681 K
品牌: AMICC [ AMIC TECHNOLOGY ]
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A25L016 Series  
Write Enable (WREN)  
The Write Enable (WREN) instruction (Figure 4.) sets the  
Write Enable Latch (WEL) bit.  
The Write Enable Latch (WEL) bit must be set prior to every  
Page Program (PP), Sector Erase (SE), Block Erase (BE),  
Chip Erase (CE) and Write Status Register (WRSR)  
instruction.  
The Write Enable (WREN) instruction is entered by driving  
Chip Select ( ) Low, sending the instruction code, and then  
S
driving Chip Select ( ) High.  
S
Figure 4. Write Enable (WREN) Instruction Sequence  
S
0
1
2
3
4
5
6
7
C
Instruction  
DIO  
High Impedance  
DO  
Write Disable (WRDI)  
The Write Disable (WRDI) instruction (Figure 5.) resets the  
Power-up  
Write Disable (WRDI) instruction completion  
Write Status Register (WRSR) instruction completion  
Page Program (PP) instruction completion  
Sector Erase (SE) instruction completion  
Block Erase (BE) instruction completion  
Chip Erase (CE) instruction completion  
Write Enable Latch (WEL) bit.  
The Write Disable (WRDI) instruction is entered by driving Chip  
S
Select ( ) Low, sending the instruction code, and then driving  
Chip The Write Enable Latch (WEL) bit is reset under the  
following conditions:  
Figure 5. Write Disable (WRDI) Instruction Sequence  
S
0
1
2
3
4
5
6
7
C
Instruction  
DIO  
High Impedance  
DO  
(March, 2012, Version 2.0)  
11  
AMIC Technology Corp.  
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