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PI3039 参数 Datasheet PDF下载

PI3039图片预览
型号: PI3039
PDF下载: 下载PDF文件 查看货源
内容描述: 600DPI CIS图像传感器芯片 [600DPI CIS Image Sensor Chip]
分类和应用: 传感器图像传感器
文件页数/大小: 10 页 / 604 K
品牌: AMI [ AMI SEMICONDUCTOR ]
 浏览型号PI3039的Datasheet PDF文件第2页浏览型号PI3039的Datasheet PDF文件第3页浏览型号PI3039的Datasheet PDF文件第4页浏览型号PI3039的Datasheet PDF文件第5页浏览型号PI3039的Datasheet PDF文件第6页浏览型号PI3039的Datasheet PDF文件第8页浏览型号PI3039的Datasheet PDF文件第9页浏览型号PI3039的Datasheet PDF文件第10页  
of the Voltage Buffer Amplifier. The accompanying Table 6B, Timing Symbol's Definition, is on  
the next page.  
Cp is the same clock that is shown in Figure 3A. As in the Figure 3A, it is the reference for  
defining the video signal pulse times. Vp is the peak amplitude of the pixel when the image  
sensor is under light exposure. Vd is the dark level of the pixel when the image sensor has no  
light exposure. The Reset Level is during the time when image sensor is reset to ground with  
an external shunting switch, SW. Refer to any of the simplified block diagrams in the section  
under Output Circuits for Converting the Video Signal. The video line reset is active while Cp  
is high. The video signal charges video line with the falling edge of Cp.  
The shape of the video is a typical characteristic that is exhibited when the sensor current  
charges the video line capacitance. It continues to rise until it becomes asymptotic to a  
horizontal line. However for clock frequency >2.0MHz, the slope does not reach the  
asymptotic condition. Because of this ever-charging slope, the output voltage changes with  
the clock frequency and its duty cycle. Hence, there is no optimum point for the video pixel  
sampling position. Using an edge triggered sampling A/D with a very narrow aperture, the  
users of these CIS devices samples the signal as close to top of the waveform as possible.  
Although the optimum way is adjust the sampling position in the application, the following  
sampling time given in terms of clock-time ratio will provide a rule-of-thumb in setting the  
sampling time. By using the relationship below, the user can place the sampling clock within  
an acceptable range.  
Tsmp » [to x (1.0 – Dty) + Damp]  
where Dty is the clock duty cycle defined in above Table 6A.  
Item  
Symbol  
to(1)  
tsmp (2)  
Damp (3)  
Minimum  
166  
107  
Mean  
200  
120  
20  
Maximum  
10000  
Units  
ns  
ns  
Clock Pulse Period  
Video Sample Time  
Amplifier Group  
Delay  
15  
%
Video fall time  
tvf  
20  
30  
ns  
Table 6B. Supplement Timing Symbol's Definition  
Notes:  
1) to is the clock cycle period with minimum set with 6.0 MHz.  
2) tsmp has been previously defined above, with Dty=0.5  
3) Damp is group delay time associated with the amplifier design in Figure 4C, Video  
Buffer Amplifier, EL2044 by Elantec.  
PAGE 7 OF 10, PI3039, 12/2/02