AMIS-721250: Contact Image Sensor
5.1 Definitions of Electro-optical Specifications
Data Sheet
°
All electrical specifications are measured at a pixel rate of 2.5MHz, a temperature of 25 C, Vdd=5.0V, Vref=1.7V and at an integration
time of 2.2ms for 600dpi and 4.4ms for 1200dpi. The average output voltage (Vpavg) is adjusted to approximately 1.0V, unless stated
otherwise. The modules’ internal Green LED (525 ± 20nm) was used as the light source for measurements requiring illumination. As a
guideline, the recommended load on the output should be 1KΩ<RL<10kΩ. All measurements were taken with a 2kΩ load on the output.
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The switch control input (SC) is connected to ground or to Vdd to set the sensor to operate in the 600dpi or 1200dpi mode, respectively. In the 1200dpi mode, all
688 pixels are clocked out, whereas in the 600dpi mode, pixels one and two are combined, three and four are combined and so on up to pixels 687 and 688 being
combined. One half of the pixel amplifiers and one half of the scanning register are then disabled. As a result, sensitivity in the 600dpi mode will be twice that of
the 1200dpi mode. The 600dpi readout time will be approximately half of the 1200dpi readout time.
Sensitivity (Sv) is defined as the slope of the Vpavg vs. Exposure curve.
Saturation voltage (VSat) is defined as the maximum video output voltage swing measured from the dark level to the saturation level. It is measured by using the
module LED light source with the module imaging a uniform white target. The LED light level is increased until the output voltage no longer increases with an
increase in the LED brightness. The dark level is set by the voltage on VREF and is recommended to be set externally to a voltage of 1.7V for optimal module
operation.
Photo-response non-uniformity (Up+, Up-, Up_total): Up+ = ((Vpmax-Vpavg)/Vpavg) x 100%, Up- = ((Vpavg-Vpmin)/Vpavg) x 100%, and Up_total is the absolute
value of (Up+) + (Up-), where Vpmax is the maximum pixel output voltage in the light, Vpmin is the minimum pixel output voltage in the light and Vpavg is average
output voltage of all pixels in the light.
Total photo-response non-uniformity (Up_total).
Adjacent photo-response non-uniformity (Upn): Upn = ABS (Max ((Vpn – Vpn+1) / Min (Vpn, Vpn+1))) x 100%, where Vpn is the pixel output voltage of pixel n in
the light.
Dark output voltage (Vd): Vd is the average dark output level and is essentially the offset level of the video output in the dark. The dark level is set by the voltage
on VREF and is recommended to be set externally to a voltage of 1.7V for optimal module operation.
Dark output non-uniformity (Ud): Ud = Vdmax-Vdmin, where Vdmax is the maximum pixel output voltage in the dark and Vdmin is the minimum pixel output
voltage in the dark.
Random thermal noise (rms), (Vno) is the standard deviation of n pixels in the dark. A sample size n = 64 was used. A 3mV rms value has a peak-peak equivalent
of 18mV.
Sensor-to-sensor photo-response non-uniformity (Usensor). Usensor = (Vpavg – Wavg) / Wavg), where Wavg is the average output of all sensors on the same
wafer that pass all other specifications.
Photo-response linearity (PRL): Photo-response linearity is defined as the max. deviation of response compared to a best fit line. The data points plotted are those
that lie within 10 percent of the saturation level and 90 percent of the saturation level. Outside these ranges the module is approaching non-linearity.
6.0 Recommended Operating Conditions
°
C.
Table 3: Recommended Operating Conditions @ 25 C
Parameter
Power supply
(1)
Clock input voltage high level
(1)
Clock input voltage low level
Power supply current
Reference voltage
(3)
(2)
°
Symbol
Vdd
Min.
4.5
3.1
0
IDD (sensor selected)
IDD (sensor not selected)
VREF
1.3
0.25
0.5
Tint
248
230
Typ.
5.0
3.3
0
8
4
1.7
1.25
2.5
Max.
5.5
3.5
0.8
10
5
1.7
1.5
3.0
Units
V
V
V
mA
mA
V
MHz
MHz
µs
µs
/ die
Clock frequency
(4)
Pixel rate
(5)
Integration time (line scan rate)
First die
Subsequent die
(6)
Clock pulse duty cycle
Notes:
1.
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3.
4.
5.
50
%
6.
This applies to all clocks; GBST, SI and CLK, the CLK line having a capacitance of approximately 20pF.
The dark level is set by the voltage on VREF and is recommended to be set externally to a voltage of 1.7V for optimal module operation.
Although the device will operate with a pixel rate of less than 500kHz, it is recommended that the device be operated above 500kHz to maintain performance
characteristics. Operating below 500kHz may result in leakage current degradation.
Two pixels are clocked out for every clock cycle.
Tint is the integration time of a single sensor and is the time between two start pulses. The minimum integration time is the time it takes to clock out 55 inactive
pixels and 688 active pixels for the 1200dpi mode, or 55 inactive pixels and 344 active pixels for the 600dpi mode, at a given frequency.
However, if several sensors are cascaded together in a module then the minimum integration time for the 1200dpi mode is the time it takes to clock out 55 inactive
pixels and 688 active pixels from the first sensor and 688 pixels from each of all subsequent sensors, at a given frequency.
Similarly, for cascaded sensors in the 600dpi mode, the minimum integration time is the time it takes to clock out 55 inactive pixels and 344 active pixels from the
first sensor and 344 pixels from each of all subsequent sensors, at a given frequency.
The clock duty cycle is defined as the ratio of the positive duration of the clock to its period.
AMI Semiconductor
– Dec. 05, M-20496-004
www.amis.com
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AMI [ AMI SEMICONDUCTOR ]
