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MACH211SP-7JC 参数 Datasheet PDF下载

MACH211SP-7JC图片预览
型号: MACH211SP-7JC
PDF下载: 下载PDF文件 查看货源
内容描述: 高密度EE CMOS可编程逻辑 [High-Density EE CMOS Programmable Logic]
分类和应用: 可编程逻辑
文件页数/大小: 37 页 / 253 K
品牌: AMD [ AMD ]
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Table 1. Logic Allocation  
Macrocell  
Output Buried  
FUNCTIONAL DESCRIPTION  
The MACH211SP consists of four PAL blocks con-  
nected by a switch matrix.There are 32 I/O pins feeding  
the switch matrix. These signals are distributed to the  
four PAL blocks for efficient design implementation.  
There are two clock pins that can also be used as ded-  
icated inputs.  
Available Clusters  
C , C , C  
M
M
M
M
M
0
2
4
6
8
0
1
2
M
M
M
M
M
C , C , C , C  
1
3
5
7
9
0
1
2
3
4
C , C , C , C  
1
2
3
The PAL Blocks  
C , C , C , C  
2
3
4
5
Each PAL block in the MACH211SP (Figure 1) contains  
a 64-product-term logic array, a logic allocator, 8 output  
macrocells, 8 buried macrocells, and 8 I/O cells. The  
switch matrix feeds each PAL block with 26 inputs.This  
makes the PAL block look effectively like an indepen-  
dent “PAL26V16” with 8 buried macrocells.  
C , C , C , C  
3
4
5
6
C , C , C , C  
4
5
6
7
C , C , C , C  
5
6
7
8
C , C , C , C  
6
7
8
9
In addition to the logic product terms, two output enable  
product terms, an asynchronous reset product term,  
and an asynchronous preset product term are pro-  
vided. One of the two output enable product terms can  
be chosen within each I/O cell in the PAL block. All  
flip-flops within the PAL block are initialized together.  
C , C , C , C  
7
8
9
10  
C , C , C , C  
11  
8
9
10  
M
M
M
C , C , C , C  
10  
12  
14  
9
10  
11  
12  
M
M
M
C
C
C
, C , C , C  
11 12  
11  
13  
15  
10  
11  
13  
14  
15  
The Switch Matrix  
, C , C , C  
12 13  
The MACH211SP switch matrix is fed by the inputs and  
feedback signals from the PAL blocks. Each PAL block  
provides 16 internal feedback signals and 8 I/O feed-  
back signals. The switch matrix distributes these sig-  
nals back to the PAL blocks in an efficient manner that  
also provides for high performance. The design soft-  
ware automatically configures the switch matrix when  
fitting a design into the device.  
, C , C , C  
12  
13  
14  
C
, C , C  
14 15  
13  
C
, C  
15  
14  
feedback whether configured with or without the  
flip-flop. The registers can be configured as D-type or  
T-type, allowing for product-term optimization.  
The flip-flops can individually select one of two clock/  
gate pins, which are also available as data inputs. The  
registers are clocked on the LOW-to-HIGH transition of  
the clock signal. The latch holds its data when the gate  
input is HIGH, and is transparent when the gate input  
is LOW. The flip-flops can also be asynchronously ini-  
tialized with the common asynchronous reset and pre-  
set product terms.  
The Product-term Array  
The MACH211SP product-term array consists of 64  
product terms for logic use, and 4 special-purpose  
product terms. Two of the special-purpose product  
terms provide programmable output enable; one pro-  
vides asynchronous reset, and one provides asynchro-  
nous preset.  
The Logic Allocator  
The buried macrocells are the same as the output  
macrocells if they are used for generating logic. In that  
case, the only thing that distinguishes them from the  
output macrocells is the fact that there is no I/O cell  
connection, and the signal is only used internally. The  
buried macrocell can also be configured as an input  
register or latch.  
The logic allocator in the MACH211SP takes the 64  
logic product terms and allocates them to the 16  
macrocells as needed. Each macrocell can be driven  
by up to 16 product terms. The design software auto-  
matically configures the logic allocator when fitting the  
design into the device.  
The I/O Cell  
Table 1 illustrates which product term clusters are avail-  
able to each macrocell within a PAL block. Refer to  
Figure 1 for cluster and macrocell numbers.  
The I/O cell in the MACH211SP consists of a  
three-state output buffer. The three-state buffer can be  
configured in one of three ways: always enabled, al-  
ways disabled, or controlled by a product term. If prod-  
uct term control is chosen, one of two product terms  
may be used to provide the control. The two product  
terms that are available are common to all I/O cells in a  
PAL block.  
The Macrocell  
The MACH211SP has two types of macrocell: output  
and buried. The output macrocells can be configured  
as either registered, latched, or combinatorial, with pro-  
grammable polarity. The macrocell provides internal  
MACH211SP-7/10/12/15/20  
7
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