P R E L I M I N A R Y
Table 16.
Command
Sequence
(Note 1)
Read (Note 6)
Reset (Note 7)
Autoselect (Note 8)
Manufacturer ID
Device ID
Sector Protect Verify
(Note 10)
Cycles
First
Addr
RA
XXX
555
555
555
555
555
555
555
555
XXX
BA
555
555
BA
BA
55
Data
RD
F0
AA
AA
AA
AA
AA
AA
AA
AA
A0
90
AA
AA
B0
30
98
PD = Data to be programmed at location PA. Data latches on the rising
edge of WE# or CE#f pulse, whichever happens first.
SADD = Address of the sector to be verified (in autoselect mode) or
erased. Address bits A20–A12 uniquely select any sector.
BA = Address of the bank that is being switched to autoselect mode, is
in bypass mode, or is being erased.
Command Definitions (Flash Word Mode)
Bus Cycles (Notes 2–5)
Second
Addr
Data
Third
Addr
Data
Addr
Fourth
Fifth
Addr
Data
Sixth
Addr
Data
1
1
4
4
4
4
3
4
4
3
2
2
6
1
1
1
2AA
2AA
2AA
2AA
2AA
2AA
2AA
2AA
PA
XXX
2AA
2AA
55
55
55
55
55
55
55
55
PD
00
55
55
(BA)555
(BA)555
(BA)555
(BA)555
555
555
555
555
90
90
90
90
88
90
A0
20
(BA)X00
0001
(BA)X01 see Table 17
(BA)X03
(SADD)
X02
XXX
PA
0082/0002
0000/0001
Enter SecSi Sector Region
Exit SecSi Sector Region
Program
Unlock Bypass
Unlock Bypass Program
(Note 11)
Unlock Bypass Reset (Note 12)
Chip Erase
Sector Erase
Erase Suspend (Note 13)
Erase Resume (Note 14)
CFI Query (Note 15)
00
PD
555
555
80
80
555
555
AA
AA
2AA
2AA
55
55
555
SADD
10
30
Legend:
X = Don’t care
RA = Address of the memory location to be read.
RD = Data read from location RA during read operation.
PA = Address of the memory location to be programmed. Addresses
latch on the falling edge of the WE# or CE#f pulse, whichever happens
later.
Notes:
1. See Table 1 for description of bus operations.
2.
3.
4.
5.
6.
7.
All values are in hexadecimal.
Except for the read cycle and the fourth cycle of the autoselect
command sequence, all bus cycles are write cycles.
Data bits DQ15–DQ8 are don’t care in command sequences,
except for RD and PD.
Unless otherwise noted, address bits A20–A12 are don’t cares.
No unlock or command cycles required when bank is in read
mode.
The Reset command is required to return to reading array data
(or to the erase-suspend-read mode if previously in Erase
Suspend) when a bank is in the autoselect mode, or if DQ5 goes
high (while the bank is providing status information).
The fourth cycle of the autoselect command sequence is a read
cycle. The system must provide the bank address to obtain the
manufacturer ID, device ID, or SecSi Sector factory protect
information. See the Autoselect Command Sequence section for
more information.
The data is 80h for factory locked and 00h for not factory locked.
11. The Unlock Bypass command is required prior to the Unlock
Bypass Program command.
12. The Unlock Bypass Reset command is required to return to
reading array data when the bank is in the unlock bypass mode.
13. The system may read and program in non-erasing sectors, or
enter the autoselect mode, when in the Erase Suspend mode.
The Erase Suspend command is valid only during a sector erase
operation, and requires the bank address.
14. The Erase Resume command is valid only during the Erase
Suspend mode, and requires the bank address.
15. Command is valid when device is ready to read array data or when
device is in autoselect mode.
8.
Table 17.
Device
Autoselect Device IDs (Word Mode)
Autoselect Device ID
2255h (T), 2256h (B)
2250h (T), 2253h (B)
225Ch (T), 225Fh (B)
Am29DL322G
Am29DL323G
Am29DL324G
9.
10. The data is 00h for an unprotected sector/sector block and 01h
for a protected sector/sector block.
T = Top Boot Sector, B = Bottom Boot Sector
32
Am41DL32x8G
September 5, 2002
AMD [ ADVANCED MICRO DEVICES ]
