Table 8. Pin State Table—GPIOs/Parallel Port/PC Card Socket B
Signal Name
[Alternate
Function]
Max
Load Supply
(pF)
Power
Down Note 5 V
Group
Pin
#
Output
Drive
Reset
State Operation
Normal
Suspend
State
Type
1,2
GPIO15
[PCMA_VPP2]
Y15
V15
W15
Y14
V14
G18
V3
B
[O]
B
B
B
B
B
B
C
50
50
50
50
50
50
30
VCC
VCC
VCC
VCC
VCC
VCC
VCC
I-PD
I-PD
I-PD
I-PD
I-PU
I-PU
I-PU
I-PPD[O]
O
I-PPD[O]
O
1, 2
1, 2
1, 2
1
GPIO16
[PCMB_VCC]
B
[O]
I-PPD[O]
O
I-PPD[O]
O
GPIO17
[PCMB_VPP1]
B
[O]
I-PPD[O]
O
I-PPD[O]
O
GPIO18
[PCMB_VPP2]
B
[O]
I-PPD[O]
O
I-PPD[O]
O
GPIO19
[LBL2]
B
[O]
I-PPU[O]
O
I-PPU[O]
O
1, 2
GPIO20
[CD_A2]
B
[I]
I-PPU[O]
I-PPU
I-PPU[O]
I-PPUD
G
H
S
S
3
GPIO21
B
[O]
I-PPU[O]
O
TS-PD
I-PPU[O]
H[TS-PD][TS]
TS-PD
[PPDWE]
(PC Card
Enabled)
3
GPIO22
[PPOEN]
(PC Card
Enabled)
T3
B
[O]
C
30
VCC
I-PU
I-PPU[O]
O
TS-PD
I-PPU[O]
H[TS-PD][TS]
TS-PD
H
S
2, 3
2, 3
2, 3
2, 3
2, 3
2, 3
2, 3
2, 3
2, 3
GPIO23
[SLCT]
[WP_B]
U4
U3
U2
W2
V4
B
[I]
[I]
D
D
D
D
D
D
D
D
D
150
150
150
150
150
150
150
150
150
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
I-PU
I-PU
I-PU
I-PU
I-PU
I-PPU[O]
I-PU
I-PPU
I-PPU[O]
I-PU[I-PD]
I-PPUD
H
H
H
H
H
H
H
H
H
S
S
S
S
S
S
S
S
S
GPIO24
[BUSY]
[BVD2_B]
B
[I]
[I]
I-PPU[O]
I-PU
I-PPU
I-PPU[O]
I-PU[I-PD]
I-PPUD
GPIO25
[ACK]
[BVD1_B]
B
[I]
[I]
I-PPU[O]
I-PU
I-PPU
I-PPU[O]
I-PU[I-PD]
I-PPUD
GPIO26
[PE]
[RDY_B]
B
[I]
[I]
I-PPU[O]
I-PU
I-PPU
I-PPU[O]
I-PU[I-PD]
I-PPUD
GPIO27
[ERROR]
[CD_B]
B
[I]
[I]
I-PPU[O]
I-PU
I-PPU
I-PPU[O]
I-PU[I-PD]
I-PPUD
GPIO28
[INIT]
[REG_B]
Y2
B
OD-PU I-PPU[O]
I-PPU[O]
[OD][O]
[O]
OD-PU[O] OD-PU[OD-PD]
O
H[TS-PD][TS]
GPIO29
[SLCTIN]
[RST_B]
W3
W1
V2
B
OD-PU I-PPU[O]
I-PPU[O]
[OD][O]
[O]
OD-PU[O] OD-PU[OD-PD]
O
L[TS-PD]
GPIO30
[AFDT]
[MCEH_B]
B
OD-PU I-PPU[O]
I-PPU[O]
[OD][O]
[O]
OD-PU[O] OD-PU[OD-PD]
O
H[TS-PD][TS]
GPIO31
[STRB]
[MCEL_B]
B
OD-PU I-PPU[O]
I-PPU[O]
[OD][O]
[O]
OD-PU[O] OD-PU[OD-PD]
O
H[TS-PD][TS]
1, 2
1, 2
GPIO_CS13
[PCMA_VCC]
V16
B
[O]
B
B
50
50
VCC
VCC
I-PD
I-PD
I-PPD[O]
O
I-PPD[O]
O
GPIO_CS14
[PCMA_VPP1]
W16
B
[O]
I-PPD[O]
O
I-PPD[O]
O
Élan™SC400 and ÉlanSC410 Microcontrollers Data Sheet
47
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