31-16 RES
Reserved locations. Written as
zeros and read as undefined.
Bus Configuration Registers (BCRs)
The BCRs are used to program the configuration of the
bus interface and other special features of the
Am79C978 controller that are not related to the IEEE
802.3 MAC functions. The BCRs are accessed by first
setting the appropriate RAP value and then by perform-
ing a slave access to the BDP. See Table 35.
15-0 MSWRA
Reserved
locations.
After
H_RESET, the value in this regis-
ter will be 0005h. The setting of
this register has no effect on any
Am79C978 controller function. It
is only included for software com-
patibility with other PCnet family
devices.
All BCR registers are 16 bits in width in Word I/O mode
(DWIO = 0, BCR18, bit 7) and 32 bits in width in DWord
I/O mode (DWIO = 1). The upper 16 bits of all BCR reg-
isters is undefined when in DWord I/O mode. These
bits should be written as zeros and should be treated
as undefined when read. The default value given for
any BCR is the value in the register after H_RESET.
Some of these values may be changed shortly after
H_RESET when the contents of the external EEPROM
is automatically read in. None of the BCR register val-
ues are affected by the assertion of the STOP bit or
S_RESET.
Read always. MSWRA is read
only. Write operations have no ef-
fect.
BCR2: Miscellaneous Configuration
Note: Bits 15-0 in this register are programmable
through the EEPROM.
Bit
Name
Description
Note that several registers have no default value.
BCR0, BCR1, BCR3, BCR8, BCR10-17, and BCR21
are reserved and have undefined values. BCR2 and
BCR34 are not observable without first being pro-
grammed through the EEPROM read operation or a
user register write operation.
31-16 RES
15-14 RES
Reserved locations. Written as
zeros and read as undefined.
Reserved locations. Written and
read as zeros.
13
PHYSELEN This bit enables writes to
BCR18[4:3] for software selec-
tion of various operation and test
modes. When PHYSELEN is set
to 0 (default), the two bits can
only be written from the EE-
PROM. When PHYSELEN is set
to 1, writes to BCR18[4:3] are en-
abled.
BCR0, BCR1, BCR16, BCR17, and BCR21 are regis-
ters that are used by other devices in the PCnet family.
Writing to these registers have no effect on the opera-
tion of the Am79C978 controller.
Writes to those registers marked as “Reserved” will
have no effect. Reads from these locations will produce
undefined values.
BCR0: Master Mode Read Active
Bit
Name
Description
This bit is always read/write ac-
cessible. TSTSHDEN is cleared
to 0 by H_RESET and is unaffect-
ed by S_RESET or by setting the
STOP bit.
31-16 RES
Reserved locations. Written as
zeros and read as undefined.
15-0 MSRDA
Reserved
locations.
After
H_RESET, the value in this regis-
ter will be 0005h. The setting of
this register has no effect on any
Am79C978 controller function. It
is only included for software com-
patibility with other PCnet family
devices.
12
LEDPE
LED Program Enable. When
LEDPE is set to 1, programming
of the LED0 (BCR4), LED1
(BCR5), LED2 (BCR6), LED3
(BCR7), and LED4 (BCR48) reg-
isters is enabled. When LEDPE is
cleared to 0, programming of
LED0 (BCR4), LED1 (BCR5),
LED2 (BCR6), LED3 (BCR7),
and LED4 (BCR48) registers is
disabled. Writes to those regis-
ters will be ignored.
Read always. MSRDA is read
only. Write operations have no ef-
fect.
BCR1: Master Mode Write Active
Bit Name Description
Am79C978
145
AMD [ AMD ]
