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AM29LV017D-120EC 参数 Datasheet PDF下载

AM29LV017D-120EC图片预览
型号: AM29LV017D-120EC
PDF下载: 下载PDF文件 查看货源
内容描述: 16兆位(2M ×8位) CMOS 3.0伏只统一部门快闪记忆体 [16 Megabit (2 M x 8-Bit) CMOS 3.0 Volt-only Uniform Sector Flash Memory]
分类和应用: 闪存内存集成电路光电二极管
文件页数/大小: 48 页 / 952 K
品牌: AMD [ AMD ]
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COMMAND DEFINITIONS  
Writing specific address and data commands or  
sequences into the command register initiates device  
operations. Table 8 defines the valid register command  
sequences. Writing incorrect address and data  
values or writing them in the improper sequence  
resets the device to reading array data.  
The reset command may be written between the se-  
quence cycles in an autoselect command sequence.  
Once in the autoselect mode, the reset command must  
be written to return to reading array data (also applies  
to autoselect during Erase Suspend).  
If DQ5 goes high during a program or erase operation,  
writing the reset command returns the device to read-  
ing array data (also applies during Erase Suspend).  
All addresses are latched on the falling edge of WE# or  
CE#, whichever happens later. All data is latched on  
the rising edge of WE# or CE#, whichever happens  
first. Refer to the appropriate timing diagrams in the  
“AC Characteristics” section.  
Autoselect Command Sequence  
The autoselect command sequence allows the host  
system to access the manufacturer and devices codes,  
and determine whether or not a sector is protected.  
Table 8 shows the address and data requirements. This  
method is an alternative to that shown in Table 3, which  
Reading Array Data  
The device is automatically set to reading array data  
after device power-up. No commands are required to  
retrieve data. The device is also ready to read array  
data after completing an Embedded Program or Em-  
bedded Erase algorithm.  
is intended for PROM programmers and requires V  
on address bit A9.  
ID  
The autoselect command sequence is initiated by writ-  
ing two unlock cycles, followed by the autoselect com-  
mand. The device then enters the autoselect mode,  
and the system may read at any address any number  
of times, without initiating another command sequence.  
A read cycle at address XX00h retrieves the manufac-  
turer code. A read cycle at address XX01h returns the  
device code. A read cycle containing a sector address  
(SA) and the address 02h returns 01h if that sector is  
protected, or 00h if it is unprotected. Refer to Table 2 for  
valid sector addresses.  
After the device accepts an Erase Suspend command,  
the device enters the Erase Suspend mode. The sys-  
tem can read array data using the standard read tim-  
ings, except that if it reads at an address within erase-  
suspended sectors, the device outputs status data.  
After completing a programming operation in the Erase  
Suspend mode, the system may once again read array  
data with the same exception. See “Erase Sus-  
pend/Erase Resume Commands” for more information  
on this mode.  
The system must issue the reset command to re-en-  
able the device for reading array data if DQ5 goes high,  
or while in the autoselect mode. See the “Reset Com-  
mand” section, next.  
The system must write the reset command to exit the  
autoselect mode and return to reading array data.  
Byte Program Command Sequence  
The device programs one byte of data for each program  
operation. The command sequence requires four bus  
cycles, and is initiated by writing two unlock write cy-  
cles, followed by the program set-up command. The  
program address and data are written next, which in  
turn initiate the Embedded Program algorithm. The  
system is not required to provide further controls or tim-  
ings. The device automatically generates the program  
pulses and verifies the programmed cell margin. Table  
8 shows the address and data requirements for the  
byte program command sequence.  
See also “Requirements for Reading Array Data” in the  
“Device Bus Operations” section for more information.  
The Read Operations table provides the read parame-  
ters, and Figure 13 shows the timing diagram.  
Reset Command  
Writing the reset command to the device resets the de-  
vice to reading array data. Address bits are don’t care  
for this command.  
The reset command may be written between the se-  
quence cycles in an erase command sequence before  
erasing begins. This resets the device to reading array  
data. Once erasure begins, however, the device ig-  
nores reset commands until the operation is complete.  
When the Embedded Program algorithm is complete,  
the device then returns to reading array data and ad-  
dresses are no longer latched. The system can deter-  
mine the status of the program operation by using DQ7,  
DQ6, or RY/BY#. See “Write Operation Status” for in-  
formation on these status bits.  
The reset command may be written between the se-  
quence cycles in a program command sequence be-  
fore programming begins. This resets the device to  
reading array data (also applies to programming in  
Erase Suspend mode). Once programming begins,  
however, the device ignores reset commands until the  
operation is complete.  
Any commands written to the device during the Em-  
bedded Program Algorithm are ignored. Note that a  
hardware reset immediately terminates the program-  
ming operation. The Byte Program command se-  
Am29LV017D  
21  
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