Table 4. Am29F040 Command Definitions
Fourth Bus
Bus
Write
Cycles
Req’d
First Bus
Write Cycle
Second Bus
Write Cycle
Third Bus
Write Cycle
Read/Write
Cycle
Fifth Bus
Write Cycle
Sixth Bus
Write Cycle
Command
Sequence
Read/Reset
Addr
Data Addr Data Addr Data Addr
Data
Addr Data Addr Data
Read/Reset
Read/Reset
1
4
XXXXH F0H
5555H AAH 2AAAH 55H 5555H F0H
RA
00H
01H
PA
RD
01H
A4H
PD
Autoselect
4
5555H AAH 2AAAH 55H 5555H 90H
5555H AAH 2AAAH 55H 5555H A0H
Byte Program
Chip Erase
4
6
6
5555H AAH 2AAAH 55H 5555H 80H 5555H
5555H AAH 2AAAH 55H 5555H 80H 5555H
AAH 2AAAH 55H 5555H 10H
AAH 2AAAH 55H SA 30H
Sector Erase
Sector Erase Suspend
Sector Erase Resume
Erase can be suspended during sector erase with Addr (don’t care), Data (B0H)
Erase can be resumed after suspend with Addr (don’t care), Data (30H)
Notes:
1. Address bits A15, A16, A17, and A18 = X = Don’t Care for all address commands except for Program Address (PA), Sector
Address (SA), Read Address (RA), and autoselect sector protect verify.
2. Bus operations are defined in Table 1.
3. RA = Address of the memory location to be read.
PA = Address of the memory location to be programmed. Addresses are latched on the falling edge of the WEpulse.
SA = Address of the sector to be erased. The combination of A18, A17, A16 will uniquely select any sector (see Table 3).
4. RD = Data read from location RA during read operation.
PD = Data to be programmed at location PA. Data is latched on the rising edge of WE.
5. Read from non-erasing sectors is allowed in the Erase Suspend mode.
The device contains a command autoselect operation
Read/Reset Command
to supplement traditional PROM programming method-
The read or reset operation is initiated by writing the
ology. The operation is initiated by writing the auto-
read/reset command sequence into the command reg-
select command sequence into the command register.
ister. Microprocessor read cycles retrieve array data
Following the command write, a read cycle from ad-
from the memory. The device remains enabled for
dress XX00H retrieves the manufacture code of 01H. A
reads until the command register contents are altered.
read cycle from address XX01H returns the device
The device will automatically power-up in the read/
reset state. In this case, a command sequence is not
required to read data. Standard microprocessor read
cycles will retrieve array data. This default value en-
sures that no spurious alteration of the memory content
occurs during the power transition. Refer to the AC
Read Characteristics and Waveforms for the specific
timing parameters.
code A4H (see Table 2). All manufacturer and device
codes will exhibit odd parity with the MSB (DQ7)
defined as the parity bit.
Scanning the sector addresses (A16, A17, A18) while
(A6, A1, A0) = (0, 1, 0) will produce a logical “1” at
device output DQ0 for a protected sector.
To terminate the operation, it is necessary to write the
read/reset command sequence into the register.
Autoselect Command
Byte Programming
Flash memories are intended for use in applications
where the local CPU alters memory contents. As such,
manufacture and device codes must be accessible
while the device resides in the target system. PROM
programmers typically access the signature codes by
raising A9 to a high voltage. However, multiplexing high
voltage onto the address lines is not generally desired
system design practice.
The device is programmed on a byte-by-byte basis.
Programming is a four bus cycle operation. There are
two “unlock” write cycles. These are followed by the
program setup command and data write cycles. Ad-
dresses are latched on the falling edge of CE or WE,
whichever happens later and the data is latched on the
rising edge of CE or WE, whichever happens first. The
Am29F040
9
AMD [ AMD ]
