Table 2. Am29F040 Autoselect Codes
Code
Type
A18 A17 A16
A6
A1
A0 (HEX) DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0
Manufacturer
ID
X
X
X
X
X
X
V
V
V
01H
A4H
01H*
0
1
0
0
0
0
0
1
0
0
0
0
0
0
0
0
1
0
0
0
0
1
0
1
IL
IL
IL
IL
IH
IL
Am29F040
Device ID
V
V
V
IH
Sector
Protection
Sector Addresses
V
V
V
IL
IL
*Outputs 01H at protected sector addresses
Table 3. Sector Addresses
Sector Protection
The Am29F040 features hardware sector protection.
This feature will disable both program and erase
operations in any number of sectors (0 through 8). The
sector protect feature is enabled using programming
equipment at the user’s site.The device is shipped with
all sectors unprotected. Alternatively, AMD may pro-
gram and protect sectors in the factory prior to shipping
the device (AMD’s ExpressFlash™ Service).
A18
0
A17
0
A16
0
Address Range
00000h–0FFFFh
10000h–1FFFFh
20000h–2FFFFh
30000h–3FFFFh
40000h–4FFFFh
50000h–5FFFFh
60000h–6FFFFh
70000h–7FFFFh
SA0
SA1
SA2
SA3
SA4
SA5
SA6
SA7
0
0
1
0
1
0
0
1
1
1
0
0
It is also possible to determine if a sector is protected
in the system by writing an Autoselect command.
Performing a read operation at the address location
XX02H, where the higher order addresses (A16,
A17, and A18) are used to select the desired sector.
The device produces a logical “1” at DQ0 for a pro-
tected sector and a logical “0” for an unprotected
sector. See Table 2 for Autoselect codes.
1
0
1
1
1
0
1
1
1
Write
Device erasure and programming are accomplished
via the command register. The contents of the register
serve as inputs to the internal state machine.The state
machine outputs dictate the function of the device.
Sector Unprotect
The Am29F040 also features a sector unprotect mode
so that a protected sector may be unprotected to
incorporate any changes in the code. The sector unpro-
tect is enabled using programming equipment at the
user’s site.
The command register itself does not occupy any
addressable memory location. The register is a latch
used to store the commands, along with the address
and data information needed to execute the command.
The command register is written by bringing WE to V ,
IL
Command Definitions
while CE is at V and OE is at V . Addresses are
IL
IH
Device operations are selected by writing specific ad-
dress and data sequences into the command register.
Writing incorrect address and data values or writing
them in the improper sequence will reset the device to
read mode.Table 4 defines the valid register command
sequences. Note that the Erase Suspend (B0) and
Erase Resume (30) commands are valid only while the
Sector Erase operation is in progress. Either of the two
reset commands will reset the device (when applicable).
latched on the falling edge of WE or CE, whichever
happens later; while data is latched on the rising edge
of WE or CE, whichever happens first. Standard
microprocessor write timings are used.
Refer to AC Write Characteristics and the Erase/
Programming Waveforms for specific timing parameters.
8
Am29F040
AMD [ AMD ]
