SWITCHING WAVEFORMS
Data Polling
PA
3rd Bus Cycle
Addresses
5555H
tWC
PA
tAH
tRC
tAS
CE
OE
tGHWL
tWHWH1
tWP
WE
tWPH
tCS
tDF
tDH
tOE
Data
PD
DQ7
A0H
DOUT
tDS
tOH
5.0 Volt
tCE
Notes:
1. PA is address of the memory location to be programmed.
2. PD is data to be programmed at byte address.
3. DQ7 is the output of the complement of the data written to the device.
4. DOUT is the output of the data written to the device.
5. Figure indicates last two bus cycles of four bus cycle sequence.
18805D-13
Figure 9. Program Operation Timings
tAH
5555H
Addresses
CE
2AAAH
tAS
5555H
5555H
2AAAH
SA
tGHWL
OE
tWP
tWPH
WE
tCS
tDH
Data
AAH
55H
80H
AAH
55H
10H/30H
tDS
VCC
tVCS
Note:
SA is the sector address for Sector Erase. Addresses = don’t care for Chip Erase.
18805D-14
Figure 10. AC Waveforms Chip/Sector Erase Operations
28
Am29F016
AMD [ AMD ]
