AC CHARACTERISTICS
Read-only Operations Characteristics
Parameter Symbol
Speed Options (Notes 1 and 2)
JEDEC Standard
Parameter Description
Read Cycle Time 4
Test Setup
Min
-75
-90
-120
-150
Unit
tAVAV
tAVQV
tRC
70
90
120
150
ns
CE = VIL
OE = VIL
tACC
Address to Output Delay
Max
70
90
120
150
ns
tELQV
tGLQV
tCE
tOE
Chip Enable to Output Delay
Output Enable to Output Delay
OE = VIL Max
Max
70
40
90
40
120
50
150
55
ns
ns
Chip Enable to Output High Z
(Notes 3, 4)
tEHQZ
tGHQZ
tAXQX
tDF
Max
Max
Min
20
20
0
20
20
0
30
30
0
35
35
0
ns
ns
ns
µs
Output Enable to Output High Z
(Notes 3, 4)
tDF
Output Hold Time From Addresses CE
or OE Whichever Occurs First
tOH
RESET Pin Low to Read Mode
4
tReady
Max
20
20
20
20
Notes:
1. Test Conditions (for -75):
Output Load: 1 TTL gate and 30 pF
Input rise and fall times: 5 ns
Input pulse levels: 0.0 V to 3.0 V
Timing measurement reference level: 1.5 V input and
output
2. Test Conditions (for all others):
Output Load: 1 TTL gate and 100 pF
Input rise and fall times: 20 ns
Input pulse levels: 0.45 V to 2.4 V
Timing measurement reference level: 0.8 V and 2.0 V
input and output
3. Output driver disable time.
4. Not 100% tested.
5.0 Volt
IN3064
2.7 kΩ
or Equivalent
Device
Under
Test
6.2 kΩ
CL
Diodes = IN3064
or Equivalent
Note:
CL (for -75) = 30 pF including jig capacitance
CL (for all others) = 100 pF including jig capacitance
18805D-11
Figure 7. Test Conditions
Am29F016
25
AMD [ AMD ]
