P R E L I M I N A R Y
Numerical Key to Switching Parameter Symbols (continued)
No.
43
Parameter Symbol
tCLCH
Description
CLKOUTA Low Time
44
tCHCL
CLKOUTA High Time
CLKOUTA Rise Time
45
tCH1CH2
tCL2CL1
tSRYCL
tCLSRY
tARYCH
tCLARX
tARYCHL
tARYLCL
tINVCH
46
CLKOUTA Fall Time
47
SRDY Transition Setup Time
SRDY Transition Hold Time
48
49
ARDY Resolution Transition Setup Time
ARDY Active Hold Time
50
51
ARDY Inactive Holding Time
ARDY Setup Time
52
53
Peripheral Setup Time
54
tINVCL
DRQ Setup Time
55
tCLTMV
tRESIN
Timer Output Delay
57
RES Setup Time
58
tHVCL
HOLD Setup
59
tRHDX
RD High to Data Hold on AD Bus
Maximum PLL Lock Time
HLDA Valid Delay
61
tLOCK
62
tCLHAV
tCHCZ
63
Command Lines Float Delay
Command Lines Valid Delay (after Float)
A Address Valid to WR Low
A Address Valid to RD Low
CLKOUTA High to LCS/UCS Valid
CLKOUTA High to A Address Valid
X1 to CLKOUTA Skew
64
tCHCV
65
tAVWL
66
tAVRL
67
tCHCSV
tCHAV
68
69
tCICOA
tCICOB
tCOAOB
tAVBL
70
83(a)
X1 to CLKOUTB Skew
CLKOUTA to CLKOUTB Skew
A Address Valid to WHB, WLB Low
Chip Select to ARDY Low
ARDY Assert to Data Valid
DS Low to Data Driven
87
88(a)
89(a)
90(a)
91(a)
92(a)
93(a)
tCSHARYL
tARYHDV
tDSLDD
tDSLDV
tDSHDIR
tDSHDX
DS Low to Data Valid
DS High to Data Invalid—Read
DS High to Data Bus Turn-off Time
62
Am186ED/EDLV Microcontrollers
AMD [ AMD ]
