P R E L I M I N A R Y
Alphabetical Key to Switching Parameter Symbols (continued)
Parameter Symbol
tCLCSV
tCLCX
No.
16
105
107
30
7
Description
MCS/PCS Active Delay
CLKOUTA Low to CAS Inactive
CLKOUTA Low to RAS Inactive
Data Hold Time
tCLRX
tCLDOX
tCLDV
Data Valid Delay
tCLDX
2
Data in Hold
tCLHAV
tCLRA
62
102
27
25
4
HLDA Valid Delay
CLKOUTA Low to RAS Active
RD Inactive Delay
tCLRH
tCLRL
RD Active Delay
tCLSH
Status Inactive Delay
SRDY Transition Hold Time
Timer Output Delay
tCLSRY
tCLTMV
48
55
83
88
20
31
21
17
92
98
93
41
90
91
1
(a)
tCOAOB
CLKOUTA to CLKOUTB Skew
Chip Select to ARDY Low
Control Active Delay 1
Control Inactive Delay
DEN Inactive Delay
(a)
tCSHARYL
tCVCTV
tCVCTX
tCVDEX
tCXCSX
MCS/PCS Hold from Command Inactive
DS High to Data Invalid—Read
DS High to Data Invalid—Write
DS High to Data Bus Turn-off Time
DS Inactive to ALE Inactive
DS Low to Data Driven
(a)
tDSHDIR
tDSHDIW
(a)
tDSHDX
tDSHLH
(a)
tDSLDD
(a)
tDSLDV
DS Low to Data Valid
tDVCL
Data in Setup
(a)
tDVDSL
97
19
58
53
54
23
10
13
61
99
110
111
57
29
59
94
28
Data Valid to DS Low
tDXDL
tHVCL
tINVCH
tINVCL
tLHAV
tLHLL
DEN Inactive to DT/R Low
HOLD Setup
Peripheral Setup Time
DRQ Setup Time
ALE High to Address Valid
ALE Width
tLLAX
AD Address Hold from ALE Inactive
Maximum PLL Lock Time
tLOCK
tPLAL
PCS Active to ALE Inactive
RAS To Column Address Delay Time with 0 Wait States
RAS to Column Address Delay Time with 1 or More Wait States
RES Setup Time
tRD0W
tRD1W
tRESIN
tRHAV
tRHDX
RD Inactive to AD Address Active
RD High to Data Hold on AD Bus
RD High to Data Bus Turn-off Time
RD Inactive to ALE High
(a)
tRHDZ
tRHLH
Am186ED/EDLV Microcontrollers
59
AMD [ AMD ]
