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A800DB90PF 参数 Datasheet PDF下载

A800DB90PF图片预览
型号: A800DB90PF
PDF下载: 下载PDF文件 查看货源
内容描述: 8兆位( 1一M× 8位/ 512的K× 16位) CMOS 1.8伏只超低电压闪存 [8 Megabit (1 M x 8-Bit/512 K x 16-Bit) CMOS 1.8 Volt-only Super Low Voltage Flash Memory]
分类和应用: 闪存
文件页数/大小: 46 页 / 1066 K
品牌: AMD [ AMD ]
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D A T A S H E E T  
Table 5. Am29SL800D Command Definitions  
Bus Cycles (Notes 2-5)  
Command  
Sequence  
(Note 1)  
First  
Second  
Third  
Addr  
Fourth  
Fifth  
Sixth  
Addr Data Addr Data  
Data Addr Data Addr Data Addr Data  
Read (Note 6)  
Reset (Note 7)  
1
1
RA  
XXX  
555  
RD  
F0  
Word  
Byte  
Word  
Byte  
Word  
Byte  
2AA  
555  
2AA  
555  
2AA  
555  
555  
AAA  
555  
Manufacturer ID  
4
4
4
AA  
AA  
AA  
55  
55  
55  
90  
90  
90  
X00  
01  
AAA  
555  
X01  
X02  
X01  
X02  
22EA  
EA  
Device ID,  
Top Boot Block  
AAA  
555  
AAA  
555  
226B  
6B  
Device ID,  
Bottom Boot Block  
AAA  
AAA  
XX00  
XX01  
00  
(SA)  
X02  
Word  
Byte  
Word  
Byte  
555  
AAA  
555  
2AA  
555  
2AA  
555  
555  
AAA  
555  
Sector Protect Verify  
(Note 9)  
4
4
AA  
AA  
55  
55  
90  
90  
(SA)  
X04  
01  
TBD  
TBD  
TBD  
TBD  
X03  
X04  
PA  
Extension  
AAA  
AAA  
Word  
Byte  
Word  
Byte  
555  
AAA  
555  
2AA  
555  
2AA  
555  
PA  
555  
AAA  
555  
Program  
Unlock Bypass  
4
3
AA  
AA  
55  
55  
A0  
20  
PD  
AAA  
XXX  
XXX  
555  
AAA  
Unlock Bypass Program (Note 10)  
Unlock Bypass Reset (Note 11)  
2
2
A0  
90  
PD  
00  
XXX  
2AA  
555  
2AA  
555  
Word  
555  
AAA  
555  
555  
AAA  
555  
2AA  
555  
2AA  
555  
555  
Chip Erase  
6
6
AA  
AA  
55  
55  
80  
80  
AA  
AA  
55  
55  
10  
30  
Byte  
Word  
Byte  
AAA  
555  
AAA  
Sector Erase  
SA  
AAA  
XXX  
XXX  
AAA  
AAA  
Erase Suspend (Note 12)  
Erase Resume (Note 13)  
1
1
B0  
30  
Legend:  
X = Don’t care  
PD = Data to be programmed at location PA. Data latches on the  
rising edge of WE# or CE# pulse, whichever happens first.  
RA = Address of the memory location to be read.  
RD = Data read from location RA during read operation.  
SA = Address of the sector to be verified (in autoselect mode) or  
erased. Address bits A18–A12 uniquely select any sector.  
PA = Address of the memory location to be programmed. Addresses  
latch on the falling edge of the WE# or CE# pulse, whichever  
happens later.  
Notes:  
1. See Table 1 for description of bus operations.  
9. The data is 00h for an unprotected sector and 01h for a protected  
sector. See “Autoselect Command Sequence” for more  
information.  
2. All values are in hexadecimal.  
3. Except when reading array or autoselect data, all bus cycles are  
write operations.  
10. The Unlock Bypass command is required prior to the Unlock  
Bypass Program command.  
4. Data bits DQ15–DQ8 are don’t cares for unlock and command  
cycles.  
11. The Unlock Bypass Reset command is required to return to  
reading array data when the device is in the unlock bypass mode.  
5. Address bits A18–A11 are don’t cares for unlock and command  
cycles, unless SA or PA required.  
12. The system may read and program in non-erasing sectors, or enter the  
autoselect mode, when in the Erase Suspend mode. The Erase Suspend  
command is valid only during a sector erase operation.  
6. No unlock or command cycles required when reading array data,  
unless SA or PA required.  
13. The Erase Resume command is valid only during the Erase Suspend  
mode.  
7. The Reset command is required to return to reading array data  
when device is in the autoselect mode, or if DQ5 goes high (while  
the device is providing status data).  
8. The fourth cycle of the autoselect command sequence is a read  
cycle.  
January 23, 2007 27546A6  
Am29SL800D  
19  
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