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A800DB90PF 参数 Datasheet PDF下载

A800DB90PF图片预览
型号: A800DB90PF
PDF下载: 下载PDF文件 查看货源
内容描述: 8兆位( 1一M× 8位/ 512的K× 16位) CMOS 1.8伏只超低电压闪存 [8 Megabit (1 M x 8-Bit/512 K x 16-Bit) CMOS 1.8 Volt-only Super Low Voltage Flash Memory]
分类和应用: 闪存
文件页数/大小: 46 页 / 1066 K
品牌: AMD [ AMD ]
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D A T A S H E E T  
WRITE OPERATION STATUS  
The device provides several bits to determine the  
status of a write operation: DQ2, DQ3, DQ5, DQ6,  
DQ7, and RY/BY#. Table 6 and the following subsec-  
tions describe the functions of these bits. DQ7,  
RY/BY#, and DQ6 each offer a method for determining  
whether a program or erase operation is complete or in  
progress. These three bits are discussed first.  
page 34, Data# Polling Timings (During Embedded  
Algorithms), illustrates this.  
Table 6 on page 23 shows the outputs for Data# Polling  
on DQ7. Figure 5 shows the Data# Polling algorithm.  
START  
DQ7: Data# Polling  
The Data# Polling bit, DQ7, indicates to the host  
system whether an Embedded Algorithm is in progress  
or completed, or whether the device is in Erase Sus-  
pend. Data# Polling is valid after the rising edge of the  
final WE# pulse in the program or erase command  
sequence.  
Read DQ7–DQ0  
Addr = VA  
During the Embedded Program algorithm, the device  
outputs on DQ7 the complement of the datum pro-  
grammed to DQ7. This DQ7 status also applies to  
programming during Erase Suspend. When the  
Embedded Program algorithm is complete, the device  
outputs the datum programmed to DQ7. The system  
must provide the program address to read valid status  
information on DQ7. If a program address falls within a  
protected sector, Data# Polling on DQ7 is active for  
approximately 1 µs, then the device returns to reading  
array data.  
Yes  
DQ7 = Data?  
No  
No  
DQ5 = 1?  
Yes  
During the Embedded Erase algorithm, Data# Polling  
produces a 0 on DQ7. When the Embedded Erase  
algorithm is complete, or if the device enters the Erase  
Suspend mode, Data# Polling produces a 1 on DQ7.  
This is analogous to the complement/true datum output  
described for the Embedded Program algorithm: the  
erase function changes all the bits in a sector to 1; prior  
to this, the device outputs the complement, or 0. The  
system must provide an address within any of the  
sectors selected for erasure to read valid status infor-  
mation on DQ7.  
Read DQ7–DQ0  
Addr = VA  
Yes  
DQ7 = Data?  
No  
PASS  
FAIL  
After an erase command sequence is written, if all  
sectors selected for erasing are protected, Data#  
Polling on DQ7 is active for approximately 100 µs, then  
the device returns to reading array data. If not all  
selected sectors are protected, the Embedded Erase  
algorithm erases the unprotected sectors, and ignores  
the selected sectors that are protected.  
Notes:  
1. VA = Valid address for programming. During a sector erase  
operation, a valid address is an address within any sector  
selected for erasure. During chip erase, a valid address is any  
non-protected sector address.  
2. DQ7 should be rechecked even if DQ5 = “1” because DQ7 may  
change simultaneously with DQ5.  
When the system detects DQ7 has changed from the  
complement to true data, it can read valid data at DQ7–  
DQ0 on the following read cycles. This is because DQ7  
may change asynchronously with DQ0–DQ6 while  
Output Enable (OE#) is asserted low. Figure 19, on  
Figure 5. Data# Polling Algorithm  
20  
Am29SL800D  
27546A6 January 23, 2007  
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