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A800DB90PF 参数 Datasheet PDF下载

A800DB90PF图片预览
型号: A800DB90PF
PDF下载: 下载PDF文件 查看货源
内容描述: 8兆位( 1一M× 8位/ 512的K× 16位) CMOS 1.8伏只超低电压闪存 [8 Megabit (1 M x 8-Bit/512 K x 16-Bit) CMOS 1.8 Volt-only Super Low Voltage Flash Memory]
分类和应用: 闪存
文件页数/大小: 46 页 / 1066 K
品牌: AMD [ AMD ]
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D A T A S H E E T  
The reset command may be written between the  
The program address and data are written next, which  
in turn initiate the Embedded Program algorithm. The  
system is not required to provide further controls or tim-  
ings. The device automatically generates the program  
pulses and verifies the programmed cell margin.  
Table 5 on page 19 shows the address and data  
requirements for the byte program command  
sequence.  
sequence cycles in an erase command sequence  
before erasing begins. This resets the device to reading  
array data. Once erasure begins, however, the device  
ignores reset commands until the operation is  
complete.  
The reset command may be written between the  
sequence cycles in a program command sequence  
before programming begins. This resets the device to  
reading array data (also applies to programming in  
Erase Suspend mode). Once programming begins,  
however, the device ignores reset commands until the  
operation is complete.  
When the Embedded Program algorithm is complete,  
the device then returns to reading array data and  
addresses are no longer latched. The system can  
determine the status of the program operation by using  
DQ7, DQ6, or RY/BY#. See Table on page 20 for infor-  
mation on these status bits.  
The reset command may be written between the  
sequence cycles in an autoselect command sequence.  
Once in the autoselect mode, the reset command must  
be written to return to reading array data (also applies  
to autoselect during Erase Suspend).  
Any commands written to the device during the  
Embedded Program Algorithm are ignored. Note that a  
hardware reset immediately terminates the program-  
ming operation. The Byte Program command  
sequence should be reinitiated once the device has  
reset to reading array data, to ensure data integrity.  
If DQ5 goes high during a program or erase operation,  
writing the reset command returns the device to  
reading array data (also applies during Erase  
Suspend).  
Programming is allowed in any sequence and across  
sector boundaries. A bit cannot be programmed  
from a “0” back to a “1”. Attempting to do so may halt  
the operation and set DQ5 to “1”, or cause the Data#  
Polling algorithm to indicate the operation was suc-  
cessful. However, a succeeding read will show that the  
data is still “0”. Only erase operations can convert a “0”  
to a “1”.  
Autoselect Command Sequence  
The autoselect command sequence allows the host  
system to access the manufacturer and devices codes,  
and determine whether or not a sector is protected.  
Table 5 on page 19 shows the address and data  
requirements. This method is an alternative to that  
shown in Table 4 on page 12, which is intended for  
Unlock Bypass Command Sequence  
The unlock bypass feature allows the system to  
program bytes or words to the device faster than using  
the standard program command sequence. The unlock  
bypass command sequence is initiated by first writing  
two unlock cycles. This is followed by a third write cycle  
containing the unlock bypass command, 20h. The  
device then enters the unlock bypass mode. A two-  
cycle unlock bypass program command sequence is all  
that is required to program in this mode. The first cycle  
in this sequence contains the unlock bypass program  
command, A0h; the second cycle contains the program  
address and data. Additional data is programmed in  
the same manner. This mode dispenses with the initial  
two unlock cycles required in the standard program  
command sequence, resulting in faster total program-  
ming time. Table 5 on page 19 shows the requirements  
for the command sequence.  
PROM programmers and requires V on address bit  
A9.  
ID  
The autoselect command sequence is initiated by  
writing two unlock cycles, followed by the autoselect  
command. The device then enters the autoselect  
mode, and the system may read at any address any  
number of times, without initiating another command  
sequence. A read cycle at address XX00h retrieves the  
manufacturer code. A read cycle at address 01h in  
word mode (or 02h in byte mode) returns the device  
code. A read cycle containing a sector address (SA)  
and the address 02h in word mode (or 04h in byte  
mode) returns 01h if that sector is protected, or 00h if it  
is unprotected. Refer to Table 2 on page 10 and Table 3  
on page 11 for valid sector addresses.  
The system must write the reset command to exit the  
autoselect mode and return to reading array data.  
During the unlock bypass mode, only the Unlock  
Bypass Program and Unlock Bypass Reset commands  
are valid. To exit the unlock bypass mode, the system  
must issue the two-cycle unlock bypass reset  
command sequence. The first cycle must contain the  
data 90h; the second cycle the data 00h. Addresses  
are don’t cares. The device then returns to reading  
array data.  
Word/Byte Program Command Sequence  
The system may program the device by word or byte,  
depending on the state of the BYTE# pin. Program-  
ming is a four-bus-cycle operation. The program  
command sequence is initiated by writing two unlock  
write cycles, followed by the program set-up command.  
January 23, 2007 27546A6  
Am29SL800D  
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