D A T A S H E E T
Command Definitions
Table 5. Am29SL400C Command Definitions
Bus Cycles (Notes 2-5)
Command
Sequence
(Note 1)
First
Second
Third
Addr
Fourth
Fifth
Sixth
Addr Data Addr Data
Data Addr Data Addr Data Addr Data
Read (Note 6)
Reset (Note 7)
1
1
RA
XXX
555
RD
F0
Word
2AA
555
2AA
555
2AA
555
555
AAA
555
Manufacturer ID
4
4
4
AA
AA
AA
55
55
55
90
90
90
X00
01
Byte
Word
Byte
Word
Byte
AAA
555
X01
X02
X01
X02
70h
70h
FIh
Device ID,
Top Boot Block
AAA
555
AAA
555
Device ID,
Bottom Boot Block
AAA
AAA
FIh
XX00
XX01
00
(SA)
X02
Word
Byte
555
2AA
555
555
Sector Protect Verify
(Note 9)
4
AA
55
90
(SA)
X04
AAA
AAA
01
Word
Byte
Word
Byte
555
AAA
555
2AA
555
2AA
555
PA
555
AAA
555
Program
Unlock Bypass
4
3
AA
AA
55
55
A0
20
PA
PD
AAA
XXX
XXX
555
AAA
Unlock Bypass Program (Note 10)
Unlock Bypass Reset (Note 11)
2
2
A0
90
PD
00
XXX
2AA
555
2AA
555
Word
555
AAA
555
555
AAA
555
2AA
555
2AA
555
555
Chip Erase
6
6
AA
AA
55
55
80
80
AA
AA
55
55
10
30
Byte
Word
Byte
AAA
555
AAA
Sector Erase
SA
AAA
XXX
XXX
AAA
AAA
Erase Suspend (Note 12)
Erase Resume (Note 13)
1
1
B0
30
Legend:
X = Don’t care
PD = Data to be programmed at location PA. Data latches on the rising
edge of WE# or CE# pulse, whichever happens first.
RA = Address of the memory location to be read.
RD = Data read from location RA during read operation.
SA = Address of the sector to be verified (in autoselect mode) or
erased. Address bits A17–A12 uniquely select any sector.
PA = Address of the memory location to be programmed. Addresses
latch on the falling edge of the WE# or CE# pulse, whichever happens
later.
Notes:
8. The fourth cycle of the autoselect command sequence is a read
cycle.
1. See Table 1 for description of bus operations.
2. All values are in hexadecimal.
9. The data is 00h for an unprotected sector and 01h for a protected
sector. See “Autoselect Command Sequence” for more
information.
3. Except when reading array or autoselect data, all bus cycles are
write operations.
10. The Unlock Bypass command is required prior to the Unlock
Bypass Program command.
4. Data bits DQ15–DQ8 are don’t cares for unlock and command
cycles.
11. The Unlock Bypass Reset command is required to return to
reading array data when the device is in the unlock bypass mode.
5. Address bits A17–A11 are don’t cares for unlock and command
cycles, unless SA or PA required.
12. The system may read and program in non-erasing sectors, or
enter the autoselect mode, when in the Erase Suspend mode.
The Erase Suspend command is valid only during a sector erase
operation.
6. No unlock or command cycles required when reading array data,
unless SA or PA required.
7. The Reset command is required to return to reading array data
when device is in the autoselect mode, or if DQ5 goes high (while
the device is providing status data).
13. The Erase Resume command is valid only during the Erase Suspend
mode.
18
Am29SL400C
Am29SL400C_00_A6 January 23, 2007
AMD [ AMD ]
