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A400CT15VF 参数 Datasheet PDF下载

A400CT15VF图片预览
型号: A400CT15VF
PDF下载: 下载PDF文件 查看货源
内容描述: 4兆位( 512K的×8位/ 256千×16位) CMOS 1.8伏只超低电压闪存 [4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 1.8 Volt-only Super Low Voltage Flash Memory]
分类和应用: 闪存
文件页数/大小: 44 页 / 850 K
品牌: AMD [ AMD ]
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D A T A S H E E T  
COMMAND DEFINITIONS  
Writing specific address and data commands or sequences  
into the command register initiates device operations.  
Table 5 on page 18 defines the valid register command se-  
quences. Writing incorrect address and data values or  
writing them in the improper sequence resets the device to  
reading array data.  
If DQ5 goes high during a program or erase operation, writ-  
ing the reset command returns the device to reading array  
data (also applies during Erase Suspend).  
Autoselect Command Sequence  
The autoselect command sequence allows the host system  
to access the manufacturer and devices codes, and deter-  
mine whether or not a sector is protected. Table 5 on  
page 18 shows the address and data requirements. This  
method is an alternative to that shown in Table 4 on page 12,  
which is intended for PROM programmers and requires VID  
on address bit A9.  
All addresses are latched on the falling edge of WE# or CE#,  
whichever happens later. All data is latched on the rising  
edge of WE# or CE#, whichever happens first. Refer to the  
appropriate timing diagrams in the AC Characteristics sec-  
tion.  
Reading Array Data  
The autoselect command sequence is initiated by writing two  
unlock cycles, followed by the autoselect command. The de-  
vice then enters the autoselect mode, and the system may  
read at any address any number of times, without initiating  
another command sequence. A read cycle at address  
XX00h retrieves the manufacturer code. A read cycle at ad-  
dress 01h in word mode (or 02h in byte mode) returns the  
device code. A read cycle containing a sector address (SA)  
and the address 02h in word mode (or 04h in byte mode) re-  
turns 01h if that sector is protected, or 00h if it is unpro-  
tected. Refer to Table 2 on page 11 and Table 3 on page 11  
for valid sector addresses.  
The device is automatically set to reading array data after  
device power-up. No commands are required to retrieve  
data. The device is also ready to read array data after com-  
pleting an Embedded Program or Embedded Erase algo-  
rithm.  
After the device accepts an Erase Suspend command, the  
device enters the Erase Suspend mode. The system can  
read array data using the standard read timings, except that  
if it reads at an address within erase-suspended sectors, the  
device outputs status data. After completing a programming  
operation in the Erase Suspend mode, the system may once  
again read array data with the same exception. See “Erase  
Suspend/Erase Resume Commands” for more information  
on this mode.  
The system must write the reset command to exit the au-  
toselect mode and return to reading array data.  
Word/Byte Program Command Sequence  
The system must issue the reset command to re-enable the  
device for reading array data if DQ5 goes high, or while in  
the autoselect mode. See the Reset Command‚ on page 15  
section, next.  
The system may program the device by word or byte, de-  
pending on the state of the BYTE# pin. Programming is a  
four-bus-cycle operation. The program command sequence  
is initiated by writing two unlock write cycles, followed by the  
program set-up command. The program address and data  
are written next, which in turn initiate the Embedded Pro-  
gram algorithm. The system is not required to provide further  
controls or timings. The device automatically generates the  
program pulses and verifies the programmed cell margin.  
Table 5 on page 18 shows the address and data require-  
ments for the byte program command sequence.  
See also Requirements for Reading Array Data‚ on page 9  
for more information. The Read Operations table provides  
the read parameters, and Figure 14‚ on page 28 shows the  
timing diagram.  
Reset Command  
Writing the reset command to the device resets the device to  
reading array data. Address bits are don’t care for this com-  
mand.  
When the Embedded Program algorithm is complete, the de-  
vice then returns to reading array data and addresses are no  
longer latched. The system can determine the status of the  
program operation by using DQ7, DQ6, or RY/BY#. See  
Write Operation Status‚ on page 19 for information on these  
status bits.  
The reset command may be written between the sequence  
cycles in an erase command sequence before erasing be-  
gins. This resets the device to reading array data. Once era-  
sure begins, however, the device ignores reset commands  
until the operation is complete.  
Any commands written to the device during the Embedded  
Program Algorithm are ignored. Note that a hardware reset  
immediately terminates the programming operation. The  
Byte Program command sequence should be reinitiated  
once the device has reset to reading array data, to ensure  
data integrity.  
The reset command may be written between the sequence  
cycles in a program command sequence before program-  
ming begins. This resets the device to reading array data  
(also applies to programming in Erase Suspend mode).  
Once programming begins, however, the device ignores  
reset commands until the operation is complete.  
Programming is allowed in any sequence and across sector  
boundaries. A bit cannot be programmed from a 0 back  
to a 1. Attempting to do so may halt the operation and set  
DQ5 to 1, or cause the Data# Polling algorithm to indicate  
the operation was successful. However, a succeeding read  
will show that the data is still 0. Only erase operations can  
convert a 0 to a 1.  
The reset command may be written between the sequence  
cycles in an autoselect command sequence. Once in the au-  
toselect mode, the reset command must be written to return  
to reading array data (also applies to autoselect during  
Erase Suspend).  
January 23, 2007 Am29SL400C_00_A6  
Am29SL400C  
15  
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